Special Instruction Addressing - Renesas R8C/Tiny Series Software Manual

Chapter 2 Addressing Modes

2.4 Special Instruction Addressing

20-bit absolute
The value indicated by abs20 constitutes
abs20
the effective address to be operated on.
The effective address range is 00000
FFFFF
This addressing can be used in LDE, STE,
JSR, and JMP instructions.
Address register relative with
20-bit displacement
The address indicated by displacement
dsp:20[A0]
(dsp) plus the content of address register
dsp:20[A1]
(A0/A1)—added not including the sign
bits—constitutes the effective address to
be operated on.
However, if the addition resulted in exceed-
ing FFFFF
ignored, and the address returns to
00000
16
This addressing can be used in LDE, STE,
JMPI, and JSRI instructions.
The following lists the addressing mode and
instruction combinations that can be used.
dsp:20[A0]
dsp:20[A1]
32-bit address register indirect
The address indicated by 32 concat-
[A1A0]
enated bits of address registers (A0
and A1) constitutes the effective
address to be operated on.
However, if the concatenated register
value exceeds FFFFF
above bit 21 are ignored.
This addressing can be used in LDE
and STE instructions.
.
16
, the bits above bit 21 are
16
.
LDE, STE, JMPI, and JSRI in-
structions
JMPI and JSRI instructions
, the bits
16
2.4 Special Instruction Addressing
to
16
abs20
LDE, STE instructions
Register
A0 address
JMPI, JSRI instructions
Register
A0 / A1 address
PC
Register
A1
b31
address-H
address
27
Memory
Memory
dsp
Memory
dsp
A0
b16 b15 b0
address-L
Memory