Software Interrupts - Renesas R8C/Tiny Series Software Manual

Chapter 5 Interrupt
Table 5.1.1 Interrupt Source (Nonmaskable) and Fixed Vector Table
Interrupt source
Undefined instruction
Overflow
BRK instruction
Address match
Single step (Note 1)
Watchdog timer•Oscil-
lation stop detection
(Reserved)
(Reserved)
Reset
Note 1: This is dedicated interrupt for development support tools. Do not use this interrupt.

5.1.2 Software Interrupts

Software interrupts are generated by some instruction that generates an interrupt request when ex-
ecuted. Software interrupts are nonmaskable interrupts.
Undefined-instruction interrupt
This interrupt occurs when the UND instruction is executed.
Overflow interrupt
This interrupt occurs if the INTO instruction is executed when the O flag is 1 (arithmetic result is overflow).
The following lists the instructions that cause the O flag to change:
ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB
BRK interrupt
This interrupt occurs when the BRK instruction is executed.
INT instruction interrupt
This interrupt occurs when the INT instruction is executed. The software interrupt numbers which can be
specified by INT instcution are 0 to 63. Note that software interrupt numbers 4 to 31 are assigned to
peripheral function interrupts. This means that by executing the INT instruction, you can execute the
same interrupt routine as used in peripheral function interrupts.
For software interrupt numbers 0 to 31, the U flag is saved when the INT instruction is executed and the
U flag is cleared to 0 to choose the interrupt stack pointer (ISP) before executing the interrupt sequence.
The previous U flag before the interrupt occurred is restored when control returns from the interrupt
routine. For software interrupt numbers 32 to 63, when the instruction is executed, U flag does not
change but uses selected SP at the time.
Vector table addresses
Address (L) to address (H)
0FFDC to 0FFDF
16 16
0FFE0 to 0FFE3
16 16
0FFE4 to 0FFE7
16 16
0FFE8 to 0FFEB
16 16
0FFEC to 0FFEF
16 16
0FFF0 to 0FFF3
16 16
0FFF4 to 0FFF7
16 16
0FFF8 to 0FFFB
16 16
0FFFC to 0FFFF
16 16
Remarks
Interrupt generated by the UND instruction.
Interrupt generated by the INTO instruction.
Executed beginning from address indicated by vector in
variable vector table if 0FFE7
FF .
16
Can be controlled by an interrupt enable bit.
Do not use this interrupt.
247
5.1 Outline of Interrupt
address contents are
16