Renesas R8C/Tiny Series Software Manual page 154

Chapter 4 Instruction Code
(1) Mnemonic
Shows the mnemonic explained in this page.
(2) Syntax
Shows an instruction syntax using symbols.
(3) Instruction code
Shows instruction code. Entered in ( ) are omitted depending on src/dest you selected.
Content at start address
of instruction
b7
0 1 1 1 0 1 0 SIZE 1 1 0 0
Correspondence
.size SIZE
.B 0
.W 1
Contents at addresses following (start address of instruction + 2) are arranged as follows:
dsp8
#IMM8
dsp16
abs16
#IMM16
abs20
dsp20
#IMM20
(4) Table of cycles
Shows the number of cycles required to execute this instruction and the number of instruction bytes.
There is a chance that the number of cycles increases due to an effect of software wait.
Instruction bytes are indicated on the left side of the slash and execution cycles are indicated on the right side.
Content at (start address
of instruction+1)
b0 b7
Correspondence
dest
R0L/R0
R0H/R1
Rn
R1L/R2
R1H/R3
A0
An
A1
[A0]
[An]
[A1]
+0
b7 b0
8bit
b7 b0 b7
Low-order 8bit
b7 b0 b7
Low-order 8bit
Contents at addresses following
(start address of instruction + 2)
dest code
b0
(
DEST dsp8
Correspondence
DEST
0 0 0 0
dsp:8[An]
0 0 0 1
0 0 1 0
dsp:8[SB/FB]
0 0 1 1
0 1 0 0
dsp:16[An]
0 1 0 1
dsp:16[SB]
0 1 1 0
abs16
0 1 1 1
+1
b0
High-order 8bit
b0 b7
Middle-order 8bit 0 0 0 0
137
4.1 Guide to This Chapter
(See the following figure.)
)
#IMM8
#IMM16
dsp16/abs16
dest DEST
dsp:8[A0]
1 0 0 0
dsp:8[A1]
1 0 0 1
dsp:8[SB]
1 0 1 0
dsp:8[FB] 1 0 1 1
dsp:16[A0]
1 1 0 0
dsp:16[A1] 1 1 0 1
dsp:16[SB]
1 1 1 0
abs16
1 1 1 1
+2
b0
High-order
4bit