Renesas R8C/Tiny Series Software Manual page 62

Chapter 3 Functions
AND
[ Syntax ]
AND.size (:format) src,dest
[ Operation ]
dest src
[ Function ]
• This instruction logically ANDs
dest
• If is an A0 or A1 when the size specifier (.size) you selected is (.B),
perform calculation in 16 bits. If
of the A0 or A1.
[ Selectable src/dest ]
R0L/R0 R0H/R1
A0/A0 *1 A1/A1 *1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0 R3R1
*1 If you specify (.B) for the size specifier (.size), you cannot choose A0 or A1 for
neously.
[ Flag Change ]
Flag U I O
Change
Conditions
S : The flag is set when the operation resulted in MSB = 1; otherwise cleared.
Z : The flag is set when the operation resulted in 0; otherwise cleared.
[ Description Example ]
AND.B Ram:8[SB],R0L
AND.B:G A0,R0L
AND.B:G R0L,A0
AND.B:S #3,R0L
[ Related Instructions ]
dest
dest
and
src
is an A0 or A1, operation is performed on the eight low-order bits
src
R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB] dsp:8[A0]
dsp:16[SB] abs16
abs20 #IMM
A1A0
B S Z D C
OR,XOR,TST
Logically AND
AND
[ Instruction Code/Number of Cycles ]
G , S (Can be specified)
B , W
src
together and stores the result in
(See the next page for
R0L/R0 R0H/R1
A0/A0 *1 A1/A1
dsp:8[A1]
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0 R3R1
; A0's 8 low-order bits and R0L are ANDed.
; R0L is zero-expanded and ANDed with A0.
45
3.2
dest
.
src
is zero-expanded to
src dest
/ classified by format.)
dest
R1L/R2 R1H/R3
*1 [A0] [A1]
dsp:8[SB] dsp:8[FB]
SP/SP
A1A0
src dest
and
Functions
AND
Page=147
simulta-