Renesas R8C/Tiny Series Software Manual page 85

Chapter 3 Functions
DIVU
[ Syntax ]
DIVU.size src
[ Operation ]
If the size specifier (.size) is (.B)
R0L (quotient), R0H (remainder)
If the size specifier (.size) is (.W)
R0 (quotient), R2 (remainder)
[ Function ]
• This instruction divides R2R0 (R0)
remainder in R2 (R0H)
for the size specifier (.size).
src
• If is an A0 or A1 when the size specifier (.size) you selected is (.B), operation is performed on the
8 low-order bits of A0 or A1.
• If you specify (.B) for the size specifier (.size), the O flag is set when the operation resulted in the
quotient exceeding 8 bits or the divisor is 0. At this time, R0L and R0H are indeterminate.
• If you specify (.W) for the size specifier (.size), the O flag is set when the operation resulted in the
quotient exceeding 16 bits or the divisor is 0. At this time, R0 and R2 are indeterminate.
[ Selectable src ]
R0L/R0 R0H/R1
A0/A0 A1/A1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0 R3R1
[ Flag Change ]
Flag U I O
Change
Conditions
O : The flag is set when the operation resulted in the quotient exceeding 16 bits (.W) or 8 bits (.B) or
the divisor is 0; otherwise cleared.
[ Description Example ]
DIVU.B A0
DIVU.B #4
DIVU.W R0
[ Related Instructions ]
Unsigned divide
DIVide Unsigned
B , W
R0
R2R0
*1
by unsigned
*1 *1
. Shown in ( )
src
R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB]
dsp:16[SB] abs16
abs20 #IMM
A1A0
B S Z D C
DIV,DIVX,MUL,MULU
[ Instruction Code/Number of Cycles ]
src
src
src
and stores the quotient in R0 (R0L)
are the registers that are operated on when you selected (.B)
;A0's 8 low-order bits is the divisor.
68
3.2 Functions
DIVU
Page=171
*1
and the