AMD Xilinx ZCU670 User Manual page 42

J25
JTAG
2 mm 2X7
Header
TDO
U29
FT4232HL
UART
BRIDGE
TDO
U1
JTAG
IF
PS Config
Bank 503
TDO
Clock Generation
The ZCU670 board provides fixed and variable clock sources for the ZU67DR Zynq UltraScale+
RFSoC. The following table lists the source devices for each clock.
Table 17: ZCU670 Board Clock Sources
Clock (Net) Name
Fixed Frequency Clocks
PS_REF_CLK
SI5381_CLK_125
SI5381_GTR_REFCLK_USB3
UG1532 (v1.0) March 30, 2022
ZCU670 Board User Guide
Figure 16: JTAG Chain Block Diagram
TDI
TDI
TDI
Frequency
Chapter 3: Board Component Descriptions
U27
JTAG
TDI
A B
BUF
U25
JTAG
TDO
B A
BUF
33.33 MHz U130 SI570 I2C PROG. OSC. (0x5D)
125 MHz U43 SI5381A PROG. CLK GEN (0x76)
26 MHz
Send Feedback
U42
N.C.
J28 (D)
FMCP HSPC
Connector
TDI TDO
X23652-012220
Clock Source
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