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The detailed RFSoC connections for the feature described in this section are documented in the
ZCU670 board XDC file, referenced in
GEM3 Ethernet (MIO 64-77)
[Figure
2, callout 16]
The PS-side Gigabit Ethernet MAC (GEM) implements a 10/100/1000 Mb/s Ethernet interface,
shown in the following figure, which connects to a TI DP83867IRPAP Ethernet RGMII PHY
before being routed to an RJ45 Ethernet connector. The RGMII Ethernet PHY is boot strapped to
PHY address 5'b01100 (0x0C) and Auto Negotiation set to Enable. Communication with the
device is covered in the TI DP83867 RGMII PHY data sheet on the
UG1532 (v1.0) March 30, 2022
ZCU670 Board User Guide
Figure 13: USB3320 ULPI USB 2.0 Transceiver Circuit
Appendix B: Xilinx Design
Figure 14: Ethernet Block Diagram
RGMII
GEM
MIO
MDIO
Chapter 3: Board Component Descriptions
Constraints.
Texas Instruments
RJ45 and
TI
Magnetics
DP83867IR
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