AMD Xilinx ZCU670 User Manual page 47

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GTY SI570:
• Programmable oscillator: Skyworks Solutions, Inc. (SiLabs) SI570BAB000544DG (10 MHz-810
MHz, 156.250 MHz default)
• I2C 0x5D
• LVDS differential output
• Total stability: 61.5 ppm
The SI5341A and SI570 data sheets can be found on the
User SMA Clocks
[Figure
2, callout 34]
The ZCU670 board provides four clock inputs using single-ended (J128, J146) and three pairs of
SMAs (J8/J98, J99/J100, J129, J143). This provides for single-ended 1588 eCPRI 1 PPS input
and an AC coupled user clock input. This also provides for differential user ADC, DAC, and AC
coupled 1588 eCPRI clock inputs.
The single-ended 1 PPS input from J128 is connected to Renesas (IDT) 8A34001 U409.J1. The
single-ended AC coupled user input connects to Skyworks Solutions, Inc. (SiLabs) SI5381A
U43.63 (IN0).
The ADC differential pair feeds into Zynq UltraScale+ RFSoC U1 ADC Bank 226. The P-side SMA
J8 signal ADC_CLK_226_P connects to U1.AB5. The N-side SMA J98 signal ADC_CLK_226_N
connects to U1.AB4. The DAC differential pair feeds into Zynq UltraScale+ RFSoC U1 ADC Bank
228. The P-side SMA J99 signal ADC_CLK_226_P connects to U1.J5. The N-side SMA J100
signal ADC_CLK_226_N connects to U1.J4 The differential 1588 eCPRI clock signal pair is series
capacitor coupled to the Skyworks Solutions, Inc. (SiLabs) SI5381A. The P-side SMA J129 signal
8A31004_CLK3_P connects to U409.E1 CLK3_P. The N-side SMA J143 signal
8A31004_CLK3_N connects to U409.E2 CLK3_N.
See Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926). The detailed
RFSoC connections for the feature described in this section are documented in the ZCU670
board XDC file, referenced in
zSFP/zSFP+ Module Connectors
[Figure
2, callout 15]
The ZCU670 board hosts a quad zSFP/zSFP+ connector (J29) that accept zSFP or zSFP+
modules. The connectors are housed within a single 2x2 zSFP cage assembly. The following
figure shows the zSFP/zSFP+ module locations within J29.
UG1532 (v1.0) March 30, 2022
ZCU670 Board User Guide
Appendix B: Xilinx Design
Chapter 3: Board Component Descriptions
Silicon Labs
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