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Micro-SD card
○
USB-to-JTAG bridge
○
PC4 2x7 2 mm JTAG pod flat cable header
○
• Clocks
SI5381 (various frequencies)
○
For additional details on this clock, see
Output Any-Frequency Clock Generator
CLK104 (various frequencies):
○
Optional for DFE. Contact factory for availability.
- CLK104_PL_CLK
- CLK104_PL_SYSREF
- CLK104_AMS_SYSREF
- CLK104_DAC_REFCLK (direct connect SSMP)
8A34001 IEEE 1588, Synchronous Ethernet (SyncE), and eCPRI clock (various frequencies)
○
For additional details on this clock, see
Output Any-Frequency Clock Generator
PS_REF_CLK 33.333333...(33 + 1/3 MHz)
○
ADC_CLK_226 (direct connect SSMP)
○
For additional details on this clock, see
Clocks.
DAC_CLK_228 (direct connect SSMP)
○
USER_MGT_SI570 (default 156.25 MHz)
○
For additional details on this clock, see
Clocks.
USER_SI570_C0 (default 300 MHz)
○
For additional details on this clock, see
Clocks.
User SMA clocks
○
For more information, see
• PS DDR4 4 GB 64-bit SODIMM
• PL DDR4 C0 I/F 2 GB 32-bit component (4x8-bit)
UG1532 (v1.0) March 30, 2022
ZCU670 Board User Guide
Table
17,
Table
U43.
Table
17,
Table
U43.
Table
17,
Table
Table
17,
Table
Table
17,
Table
User SMA
Clocks.
Chapter 1: Introduction
18, and
SI5381A 10 Independent
18, and
SI5381A 10 Independent
18, and
Programmable User SI570
18, and
Programmable User SI570
18, and
Programmable User SI570
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