Pci Express® Bandwidth Considerations In Matrox D-Series And Mura Ipx Series Based Systems; Input Source Bandwidth Requirements; Pci Express Architecture Overview - Matrox Mura IPX Series System Builder's Manual

PCI Express
Matrox D-Series and Mura IPX Series based systems
System architecture is an important factor in determining overall capture/display performance with Matrox D-Series and Matrox Mura IPX
based systems. While the input resolutions and formats must be taken into account, the system bus-level architecture also plays an important
role in determining how to optimize the system to obtain the best possible performance. This section attempts to clarify some of the issues
that must be considered when implementing Mura-based Display Wall architectures.

Input source bandwidth requirements

Any capture architecture receives its data from external sources and transfers it to one or more graphic engines for display. The inputs may
take many forms: Analog RGB, component video, DVI, or even standard TV inputs using either composite or Y/C signals. Each of these inputs
places a different load on the system in terms of quantity of data to be transferred. Each input type is also associated with a default data format:
Analog RGB and DVI are typically transferred in 24-bit RGB, whereas composite and Y/C video data are generally transferred in 16-bit YUV.
Understanding the different transmission formats and their bandwidth requirements will help guide the integrator in setting up and
configuring a Mura-based capture system.
The bandwidth required by any input source can be expressed as follows:
Where the values fps and Bytes
analog RGB, component, and DVI modes, each pixel generally requires 4 bytes. In TV modes (or when data is represented as 16-bit YUV data)
each pixel requires 2 bytes.
For example, a high-definition source being captured at 1920
An NTSC source at 60 Hz (interlaced) requires the following bandwidth: .
Note: In some cases it may be possible to capture analog RGB or DVI sources and transfer them internally using a 16-bit YUV
format. Doing so will reduce the amount of system bandwidth required to transfer the input data; however it will generally also
degrade the capture quality (since less data is used to represent each pixel). This option should be used only when necessary and
with sources when the quality of input capture can be sacrificed.
Regardless of the resolutions and formats of the various inputs, the available system bandwidth should not be exceeded. Doing so will result
in reduced system performance and/or instability.

PCI Express architecture overview

To understand how system architecture plays a role in the available bandwidth, a basic understanding of the PCI-Express architecture is
helpful. This section describes very briefly, and in general terms, the PCI-Express architecture with the goal of providing enough background
to understand the bandwidth calculations provided later in this discussion.
PCI-Express is a point-to-point serial transmission interface using high-speed differential signaling to enable high-performance transfer of
data within systems. The PCI-Express architecture is currently in its third generation, with each generation providing increased performance
over its predecessor. The initial specification for PCI-Express defined a 2.5 Gb/s data transfer rate per lane, while the 2
Express increased the data rate to 5 Gb/s. The 3
this) has further increased the data transfer rate to 8 Gb/s per lane of data. The following table summarizes the data transfer capabilities of
the PCI-Express architecture based on generation and link width (the link width is the "size" of the electrical connection between two PCI-
Express devices).
82 Matrox Display Wall – System Builder's Guide
®
bandwidth considerations in
BW Res
=
represent the number of frames per second and the number of bytes taken by each pixel, respectively. In
pixel
BW 1920 1080
=
1080p
BW 720
=
NTSC
rd
generation of PCI-Express (which is just becoming available in systems at the time of writing
  
Res fps Bytes
x y
1080p60 requires the following bandwidth:
×
   
60 4 500 MB/s
   
480 30 2 21MB/s
pixel
nd
generation PCI-