Boot Mode And Clock Ratio Select Switch (Sw2) - Analog Devices ADSP-21375 Manual

Switch Settings

Boot Mode and Clock Ratio Select Switch (SW2)

The switch sets the boot mode and clock multiplier ratio.
SW2
shows how to set up the boot mode using
default, the EZ-KIT Lite boots in external port mode from the flash
memory.
Table 2-3. Boot Mode Configuration Switch (SW2)
BOOTCFG0 Pin (Position 1)
ON
ON
OFF
OFF
Table 2-4 shows how to set up the clock multiply ratio using
positions 3 and 4. By default, the processor increases the clock multiply
ratio by sixteen, setting the core clock to 262.144 MHz.
Table 2-4. Core Clock Rate Configuration
CLKCFG0 (Position 3)
ON
ON
OFF
OFF
The core clock frequency can be increased or decreased via software by
writing to the
clock frequency and other setup information, refer to the ADSP-21368
SHARC Processor Hardware Reference (includes ADSP-21375).
2-10
BOOTCFG1 Pin (Position 2)
ON
OFF
ON
OFF
CLKCFG1 (Position 4)
ON
OFF
ON
OFF
register. For more information on changing the core
PMCTL
ADSP-21375 EZ-KIT Lite Evaluation System Manual
positions 1 and 2. By
SW2
Boot Mode
SPI slave boot
Parallel flash boot (default)
SPI master boot
Reserved
Core to CLKIN Ratio
6:1
16:1 (default)
32:1
Reserved
Table 2-3
SW2