Switches
Boot Mode and Clock Ratio Select Switch (SW2)
2-10
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The
switch sets the boot mode and lock multiplier ratio of the proces-
SW2
sor.
Table 2-3
shows how to set up the boot mode using
positions 1 and 2. By default, the EZ-KIT Lite boots in external port
mode from flash memory.
Table 2-3. Boot Mode Configuration
BOOTCFG0 Pin (Position 1)
ON
ON
OFF
OFF
Table 2-4
shows how to set up the clock multiply ratio using
positions 3 and 4. By default, the processor increases the clock multiply
ratio by sixteen, setting the core clock to 262.144 MHz.
Table 2-4. Core Clock Rate Configuration
CLKCFG0 (Position 3)
ON
ON
OFF
OFF
The core clock frequency can be increased or decreased via software by
writing to the
register. For more information on changing the core
PMCTL
clock frequency and other setup information, refer to the ADSP-2137x
SHARC Processor Hardware Reference.
ADSP-21375 EZ-KIT Lite Evaluation System Manual
BOOTCFG1 Pin (Position 2)
ON
OFF
ON
OFF
CLKCFG1 (Position 4)
ON
OFF
ON
OFF
SW2
Boot Mode
SPI slave boot
Parallel flash boot (default)
SPI master boot
Reserved
SW2
Core to CLKIN Ratio
6:1
16:1 (default)
32:1
Reserved
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