Quectel QuecOpen AG521R-NA Hardware Design page 7

Automotive Module Series
AG521R-NA QuecOpen Hardware Design
Table Index
®
Table 1: Frequency Bands of AG521R-NA QuecOpen Module .............................................................................. 14
Table 2: Key Features ................................................................................................................................................ 15
Table 3: I/O Parameters Definition ............................................................................................................................ 21
Table 4: Pin Description ............................................................................................................................................ 22
Table 5: Alternate Functions of Multiplexing Pins .................................................................................................... 33
Table 6: Overview of Operating Modes .................................................................................................................... 37
Table 7: VBAT and GND Pins ................................................................................................................................... 40
Table 8: PWRKEY Pin Description ........................................................................................................................... 42
Table 9: PON_1 Pin Description ............................................................................................................................... 44
Table 10: RESET Pin Description ............................................................................................................................. 46
Table 11: Pin Definition of (U)SIM Interface ............................................................................................................ 48
Table 12: Pin Description of USB Interface .............................................................................................................. 50
Table 13: Pin Definition of UART1 Interface ............................................................................................................ 52
Table 14: Pin Definition of BT UART Interface ........................................................................................................ 52
Table 15: Pin Definition of Debug UART Interface .................................................................................................. 53
Table 16: Logic Levels of Digital I/O ........................................................................................................................ 53
Table 17: Pin Definition of I2S Interface ................................................................................................................... 54
Table 18: Pin Definition of I2C Interface .................................................................................................................. 55
Table 19: Pin Definition of SDIO Interface ............................................................................................................... 55
Table 20: Pin Definition of SPI Interfaces ................................................................................................................. 58
Table 21: Parameters of SPI Interface Timing ........................................................................................................... 58
Table 22: Pin Definition of RGMII Interface ............................................................................................................ 59
Table 23: Pin Definition of WLAN and BT Interfaces .............................................................................................. 62
Table 24: Pin Definition of ADC Interfaces .............................................................................................................. 65
Table 25: Characteristic of ADC Interface................................................................................................................. 65
Table 26: Pin Definition of USB_BOOT Interface .................................................................................................... 66
Table 27: Pin Definition of GPIOs ............................................................................................................................ 67
Table 28: Pin Definition of Main/Rx-diversity Antenna Interfaces ........................................................................... 68
Table 29: Module Operating Frequencies .................................................................................................................. 68
Table 30: Antenna Requirements ............................................................................................................................... 72
Table 31: Absolute Maximum Ratings ...................................................................................................................... 74
Table 32: Power Supply Ratings ................................................................................................................................ 74
Table 33: Operation and Storage Temperatures ......................................................................................................... 75
Table 34: Module Current Consumption (25 ° C, 3.8 V Power Supply) .................................................................... 76
Table 35: RF Output Power ....................................................................................................................................... 77
Table 36: RF Receiving Sensitivity (Unit: dBm) ....................................................................................................... 77
Table 37: Electrostatic Discharge Characteristics ...................................................................................................... 78
Table 38: Recommended Thermal Profile Parameters .............................................................................................. 86
Table 39: Related Documents .................................................................................................................................... 89
Table 40: Terms and Abbreviations ........................................................................................................................... 89
Table 41: Description of Different Coding Schemes ................................................................................................. 92
AG521R-NA_QuecOpen_Hardware_Design 6 / 104