Quectel QuecOpen AG521R-NA Hardware Design page 52

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Module
USB_VBUS
USB_DM
USB_DP
USB_VBUS
USB_SS_TX_P
USB_SS_TX_M
USB_SS_RX_P
USB_SS_RX_M
Module
To ensure signal integrity of USB data lines, components R1, R2 and L1 must be placed close to the module, and
also these resistors should be placed close to each other. The capacitors C1 and C2 should be placed near the
module. The capacitors C3 and C4 should be placed near the AP. The extra stubs of trace must be as short as
possible.
The following principles of USB interface should be complied with, so as to meet USB 2.0 and USB 3.0
specifications.
It is important to route the USB 2.0 and 3.0 signal traces as differential pairs with ground surrounded.
The impedance of USB differential trace is 90 Ω.
For USB 2.0 signal traces, the trace length should be less than 120 mm, and the differential data pair matching
should be less than 0.7 mm (5 ps).
For USB 3.0 signal traces, the maximum length of each differential data pair (Tx/Rx) is recommended to be
less than 100 mm, and each differential data pair matching should be less than 0.7 mm (5 ps).
AG521R-NA_QuecOpen_Hardware_Design
Minimize these stubs
R1
R2
USB_VBUS
L1
Close to Module
GND
Figure 20: Reference Circuit of USB 2.0 Application
USB_VBUS
C1
100 nF
C2
100 nF
Figure 21: Reference Circuit of USB 3.0 Application
AG521R-NA QuecOpen Hardware Design
Test Points
NM_0R
NM_0R
ESD Array
C3
100 nF
C4
100 nF
Automotive Module Series
Connector
USB_DM
USB_DP
GND
USB_SS_RX_P
USB_SS_RX_M
USB_SS_TX_P
USB_SS_TX_M
AP
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