Video Interface (J4 And J6); Display Control; Configuration - VersaLogic Ocelot Reference Manual

Intel atom-based sbc with ethernet, video, sumit, and pc/104 interface
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Distributor of VersaLogic Corporation: Excellent Integrated System Limited
Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com

Video Interface (J4 and J6)

An on-board video controller integrated into the chipset provides high-performance LVDS video
output for the VL-EPMs-21. The VL-EPMs-21 can also be operated with a VGA monitor through
an adapter or without a video card attached (headless).
D
C
ISPLAY
ONTROL
Pin
1
2
3
4
5
6
7
8
9
C
ONFIGURATION
The VL-EPMs-21 uses a shared-memory architecture. This allows the video controller to use 256
MB of system DRAM for video RAM.
The VL-EPMs-21 supports only one type of video output: LVDS Flat Panel Display.
VL-EPMs-21 Reference Manual
Signal
Name
Function
VEN
Backlight inverter power enable
GMbus_CLK
I2C-based backlight brightness control clock
GND
Ground
GMbus_DATA
I2C-based backlight brightness control data
BLEN
Backlight enable
DDC_CLK
Display Data Channel clock (EDID) for plug-n-play
GND
Ground
DDC_DATA
Display Data Channel data (EDID) for plug-n-play
BLCTL
Simple PWM-based backlight brightness control
Interfaces and Connectors
29

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