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Summary of Contents for VersaLogic Tetra VL-EPC-2700
- Page 1 Hardware Reference Manual REV. June 2018 Tetra (VL-EPC-2700) Arm* i.MX6 Single Board Computer with Gigabit Ethernet, Video, USB, SATA, Serial I/O, Digital I/O, CAN Bus, SPI, Mini PCIe, mSATA and...
- Page 2 Copyright © 2018 VersaLogic Corp. All rights reserved. Notice: Although every effort has been made to ensure this document is error-free, VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose.
- Page 3 Data sheets and manufacturers’ links for chips used in this product BIOS information and upgrades VersaTech KnowledgeBase The VersaTech KnowledgeBase contains useful technical information about VersaLogic products, along with product advisories. Customer Support If you are unable to solve a problem after reading this manual, visiting the product support page, or searching the KnowledgeBase, contact VersaLogic Technical Support at (503) 747-2261.
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Page 4: Table Of Contents
Contents Introduction ........................6 Description .......................... 6 Features and Construction ..................6 Technical Specifications ..................... 7 Thermal Considerations ...................... 7 Block Diagram ........................9 Cautions ..........................10 Electrostatic Discharge ..................10 Handling Care ...................... 10 Earth Ground Requirement .................. 10 Configuration and Setup ..................... - Page 5 LVDS Backlight (J8) ................... 22 I/O Interfaces ........................23 USB Interfaces (J1) ..................... 23 Serial I/O (J12) ....................23 User I/O (J13) ...................... 24 Audio (J10) ......................25 CAN Interface (J17, J18) ..................25 COM1 Interface (J16) ..................25 Low Cost Camera Interface (J9) ................25 Power Button ........................
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Page 6: Introduction
Introduction Description Features and Construction The Tetra is a compact embedded computer system featuring very low power consumption. Designed around an NXP i.MX6 quad-core processor, the entire board typically uses about 4W of power. Multiple on-board I/O interfaces and soldered-on memory offers system designers a flexible, reliable, low-power platform. -
Page 7: Technical Specifications
Introduction The next figure shows the locations of the Tetra board’s connectors and major components on the top. Figure 1. Major Components and Connectors Technical Specifications See the Tetra Data Sheet for complete specifications. Thermal Considerations The operating temperature for the Tetra is -40°C to +85°C, de-rated -1.1 °C per 305m (1,000 ft.) above 2,300m (7,500 ft.). - Page 8 Introduction Characteristic Value Vibration, Sinusoidal Sweep MIL-STD-202G Sinusoidal sweep: Method 204, Modified Condition A, 2g constant acceleration from 5 to 500 Hz, 20 minutes per axis Vibration, Random Random vibration: Method 214A, Condition A, 5.35g rms, 5 minutes per axis Mechanical Shock Shock: Method 213B, Condition G, 20g half-sine, 11 msec duration per axis...
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Page 9: Block Diagram
Introduction Block Diagram Figure 2. Tetra Board Block Diagram On-Board Interface Key: DDR3L Soldered Devices DDR3L DDR3L SDRAM SDRAM DDR3L DDR3L SDRAM SDRAM MRAM 128KB 64K x 16 BOOT_MODE[1] NC (PD internal) BOOT_MODE[0] Jump er USB HUB 2-Port USB Host HDMI I2C2 HDMI TX... -
Page 10: Cautions
Introduction Cautions Electrostatic Discharge CAUTION: Electrostatic discharge (ESD) can damage circuit boards, disk drives, and other components. Handle circuit board at an ESD workstation. If an approved station is not available, wearing a grounded antistatic wrist strap provides some measure of protection. -
Page 11: Configuration And Setup
HDMI monitor and cable Note: VL-CKR-Tetra includes: VL-F41-8SBN-LINUX1, CBR-0504, 2603, 3407, PS-WALL12-24, HDW-108 Use the following VersaLogic cables for wiring access points to serial (J12) and user (J13) interfaces: VL-CBR-2603 -- 0.5m 26-pin 2mm IDC to Ribbon Cable ... -
Page 12: Physical Layout
Configuration and Setup Physical Layout Tetra Dimensions The figure below shows board dimensions to help with pre-production planning and layout. Figure 3. Tetra Board Dimensions and Mounting Holes (Not to scale. All dimensions in millimeters.) Hardware Assembly The entire assembly can fit on a tabletop. When bolting the unit down, make sure to secure all standoffs to the mounting surface to prevent circuit board flexing. -
Page 13: External Connectors
Configuration and Setup External Connectors Figure 4. Connector Locations (Top Side) Tetra (VL-EPC-2700) User’s Guide... -
Page 14: Table 2. Connector Functions And Interface Cables
Configuration and Setup Tetra Connector Functions and Interface Cables The table below provides information about the function, mating connectors, and transition cables for Tetra connectors. Table 2. Connector Functions and Interface Cables Connector Transition Function Mating Connector/Device Cable/Device Description (Note) Cable USB (dual Standard USB Type A... -
Page 15: Table 3. Jumper Information
Configuration and Setup Table 3. Jumper Information EPC-2700 Reference EPC-2700 Designator Signal Name Control/Description BOOT_MODE0 BOOT_MODE0 setting, to allow use of USB OTG Device communications using the NXP i.MX6 Serial Downloader method. When this jumper is installed V2 should not be installed! Normal eFuse selected boot via SPI NOR Flash U-Boot and microSD card Yocto Linux when the... -
Page 16: System Features
Power Connectors Main power is applied to the Tetra through a 4-pin connector (J15), with mating connector VersaLogic VL-PS12-24 (12V). See the table below for connector pinout. CAUTION: To prevent severe and possibly irreparable damage to the system, it is critical that the power connectors are wired correctly. -
Page 17: Interfaces And Connectors
Calibrations and Stress Testing can be run. Do not hot-plug this jumper. There is no ESD protection employed and the settings are only read when POR# is tripped. VersaLogic part number for the jumper header is X2H2S1-R. Table 5. V1 Pinout Signal Name... -
Page 18: Storage Interfaces
Interfaces and Connectors Storage Interfaces SATA Interface (J2) The table below lists the pinout of the 7-pin SATA connector. Table 7. J2 SATA Pinout Signal SATA_TX_P SATA_TX_N SATA_RX_N SATA_RX_P Minicard Interface (J3) The table below lists the pinout of the 52-pin Minicard connector. Table 8. - Page 19 Interfaces and Connectors PCIe Minicard PCIe Minicard mSATA Signal Signal mSATA Signal Signal Reserved (NC) USB_P +3.3V +3.3Vaux +3.3V +3.3Vaux Reserved (NC) LED_WWAN# No Connect (some GND) Reserved (NC) LED_WLAN# Vendor Specific Reserved Reserved (NC) LED_WPAN# Vendor Specific Reserved +1.5V +1.5V DAS/DSS (or NC) Reserved...
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Page 20: Microsd Interface (J4)
Interfaces and Connectors MicroSD Interface (J4) The table below lists the pinout of the 8-pin MicroSD connector. Supported VersaLogic SLC extended temperature cards: • VL-F41-2EBN (2 GB) • VL-F41-4EBN (4GB) • VL-F41-8EBN (8 GB) Note: MicroSD card number VL-F41-8SBN-LINUX1 is an 8 GB MLC MicroSD card with bootable Linux, standard temperature Table 9. -
Page 21: Video Interfaces
Interfaces and Connectors Video Interfaces HDMI (J6) Table 11. HDMI Connector Pinout Signal Direction Description HDMI_D2_P HDMI Data 2 Differential Pair + DATA2SHIELD Ground HDMI_D2_N HDMI Data 2 Differential Pair - HDMI_D1_P HDMI Data 1 Differential Pair + DATA1SHIELD Ground HDMI_D1_N HDMI Data 1 Differential Pair - HDMI_D0_P... -
Page 22: Lvds Backlight (J8)
Interfaces and Connectors Signal Direction Description LVDS_TX1_P Output LVDS Data 1 (positive) LVDS_TX1_N Output LVDS Data 1 (negative) Signal Ground LVDS_TX0_P Output LVDS Data 0 (positive) LVDS_TX0_N Output LVDS Data 0 (negative) Power Ground Power Ground V3P3_LVDS_PANEL Output LVDS Panel Power (+3.3V) V3P3_LVDS_PANEL Output LVDS Panel Power (+3.3V) -
Page 23: I/O Interfaces
Interfaces and Connectors I/O Interfaces USB Interfaces (J1) Table 14. USBx2 2.0 Connector Pinout Signal Description V5_USB0_OTG Top Connector Switched USB +5V Power USB0_OTG_N USB OTG DN diff pair - (Via SoC) USB0_OTG_P USB OTG DP diff pair + (Via SoC) Top Connector Ground Bottom Connector Switched USB +5V V5_USB1_H1... -
Page 24: User I/O (J13)
Interfaces and Connectors User I/O (J13) Table 16. User I/O Pinouts Signal Description Signal Description Audio Left Line Input (Stereo Audio Right Line Input (Stereo AUD_LIN AUD_RIN Left Input) Right Input) Audio Left Line Output (Stereo GND_AUD Analog Audio Ground AUD_LOUT Left Output) Audio Right Line Output... -
Page 25: Audio (J10)
Interfaces and Connectors Audio (J10) Table 17. Audio Jack Pinout Signal Description AUD_FIL_MIC_IN Microphone input from sleeve in jack AUD_FIL_HP_LOUT Headphone output, stereo left AUD_FIL_HP_ROUT Headphone output, stereo right GND_AUD Audio Ground CAN Interface (J17, J18) Table 18. CAN Pinouts x = 1 for J17 x = 2 for J18 Signal... -
Page 26: Power Button
Interfaces and Connectors Table 20. Camera Pinouts Signal Description Ground CSI_D0_N MIPI CSI-2 Data Lane 0 (negative diff pair) CSI_D0_P MIPI CSI-2 Data Lane 0 (positive diff pair) Ground CSI_D1_N MIPI CSI-2 Data Lane 1 (negative diff pair) CSI_D1_P MIPI CSI-2 Data Lane 1 (positive diff pair) Ground CLK_CSI_N MIPI CSI-2 Clock (negative diff pair) -
Page 27: Appendix A - References
Appendix A – References • Yocto Linux User Guide for the VL-EPC-2700 • i.MX 6Dual/6 Quad Applications Processors for Industrial Products Datasheet • Hardware Development Guide for i.MX 6 Families of Application Processors • i.MX 6Dual/6Quad Applications Processor Reference Manual •... - Page 28 KNOWN ISSUES Hardware Currently the VersaLogic PCIe card VL-MPEe-U2 does not work with the Tetra board i.MX 6 SW controlled power-off is unsupported. In order to turn off the PMIC power output while the power input to the board is still supplied, you must either hold the S2 power pushbutton in or drive the PB_CTL_PWR# signal on the User IO connector (J13) low (with an open-drain driver) since the input is level sensitive by default.
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