System Resources And Maps; Memory Map; I/O Map - VersaLogic Ocelot Reference Manual

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Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
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Memory Map

The lower 1 MB memory map of the VL-EPMs-21 is arranged as shown in the following table.
Various blocks of memory space between A0000h and FFFFFh are shadowed.

I/O Map

The following table lists the common I/O devices in the VL-EPMs-21 I/O map. User I/O devices
should be added using care to avoid the devices already in the map as shown in the following
table.
Note:
The I/O port traffic is always present on the LPC bus and care must be taken to
avoid conflicts among on-board devices, PC/104, and SUMIT modules.
VL-EPMs-21 Reference Manual

System Resources and Maps

Table 19: Memory Map
Start End
Address Address
F0000h FFFFFh
E0000h EFFFFh
C0000h DFFFFh
A0000h BFFFFh
00000h 9FFFFh
Table 20: On-Board I/O Devices
I/O Device
Secondary Hard Drive Controller
PLED and Product ID Register
Revision and Type ID Register
Video BIOS and GPI Register
WDT and HWM Register
PC/104 Block Enable Registers
SPX Registers
PC104 IRQ Enable Registers
Primary Hard Drive Controller
COM4 Serial Port Default
COM2 Serial Port Default
Secondary Hard Drive Controller
COM3 Serial Port Default
Primary Hard Drive Controller
COM1 Serial Port Default
Comment
System BIOS Area
Extended System BIOS Area
Expansion Area
Legacy Video Area
Legacy System Area
Standard
I/O
Addresses
170h – 177h
1D0h
1D1h
1D2h
1D3h
1D4h – 1D5h
1D8h – 1DDh
1DEh – 1DFh
1F0h – 1F7h
2E8h – 2EFh
2F8h –2FFh
374h – 376h
3E8h – 3EFh
3F4h –3F6h
3F8h – 3FFh
6 6
46