VersaLogic Ocelot Reference Manual page 34

Distributor of VersaLogic Corporation: Excellent Integrated System Limited
Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
Pin Signal Name
1 GND
3 B_PETp4
5 B_PETn4
7 GND
9 C_CLKp
11 C_CLKn
13 CPRSNT#/GND
15 C_PETp5
17 C_PETn5
19 GND
21 NC
23 NC
25 GND
27 NC
29 NC
31 GND
33 NC
35 NC
37 GND
39 PERST#
41 NC
43 +5V
45 +5V
47 +5V
49 +5V
51 +5V
VL-EPMs-21 Reference Manual
Table 6: VL-EPMs-21 SUMIT B Connector (J1) Pinout
Function
Ground
Link B, lane 4 transmit +
Link B, lane 4 transmit –
Ground
Link C clock 5 +
Link C clock 5 –
Link C present
Link C, lane 5 transmit +
Link C, lane 5 transmit –
Ground
No connect
No connect
Ground
No connect
No connect
Ground
No connect
No connect
Ground
Reset
No connect
+5V power
+5V power
+5V power
+5V power
+5V power
Interfaces and Connectors
Pin Signal Name
2 GND
4 B_PERp4
6 B_PERn4
8 BPRSNT#/GND
10 B_CLKp
12 B_CLKn
14 GND
16 C_PERp5
18 C_PERn5
20 GND
22 NC
24 NC
26 GND
28 NC
30 NC
32 GND
34 NC
36 NC
38 GND
40 WAKE#
42 NC
44 NC
46 3.3V
48 3.3V
50 3.3V
52 +5VSB
Function
Ground
Link B, lane 4 receive +
Link B, lane 4 receive –
Link B present
Link B clock 4 +
Link B clock 4 –
Ground
Link C, lane 5 receive +
Link C, lane 5 receive –
Ground
No connect
No connect
Ground
No connect
No connect
Ground
No connect
No connect
Ground
PCIe Wake
No connect
No connect
+3.3V power
+3.3V power
+3.3V power
+5V power (common)
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