Pc/104 Memory Cycle Support; Irq Support; Dma And Bus Master Support - VersaLogic Ocelot Reference Manual

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Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
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The ISA I/O ranges listed below are supported. The I/O ranges allocated to other LPC-based
devices (on-board serial ports or SUMIT LPC bus modules) can conflict if forwarded to ISA bus
PC/104 modules. Be sure to configure the ISA I/O ranges and the on-board serial ports in CMOS
Setup to avoid conflicts with one another as well as SUMIT modules using the LPC bus.

0x080
0x100 – 0x1CF

 0x200 – 0x2E7
 0x2E8 – 0x2EF
Available base I/O addresses for on-board COM ports are: 220h, 228h, 238h, 2E8h, 2F8h, 338h,
3E8h, and 3F8h.
PC/104 M
EMORY
The VL-EPMs-21 does not support ISA memory ranges. The VL-EPMs-21 does not support
standard ISA memory cycles due to limitations of the Intel Atom architecture. The VL-EPMs-21
does provide a way to map up to 64 KB of ISA memory to the top of the board's memory map.
The base address of this memory map location is at 0xFFD00000. The 64 KB of ISA memory can
be enabled in four 16 KB blocks through the
blocks are enabled by default.
The VL-EPMs-21 only supports 8-bit ISA memory transaction; the 16BIT_EN register has no
effect on ISA memory transactions.
IRQ S
UPPORT
The following IRQs are available on the PC/104 bus:

IRQ 3, IRQ 4, IRQ 5, IRQ 6, IRQ 7, IRQ 9, IRQ 10, IRQ 11, IRQ 12, and IRQ 15
Each of the IRQs must be enabled in CMOS Setup before it can be used on the ISA bus. Because
ISA IRQ sharing is not supported, make sure that any IRQ channel used for an ISA device is not
used elsewhere. For example, if ISA IRQ 4 is enabled, you must use a different IRQ for COM1.
Not all listed IRQs may be available to the ISA bus due to operating system allocating.
DMA B M
AND US
The VL-EPMs-21 does not support PC/104 DMA or bus mastering.
VL-EPMs-21 Reference Manual
 0x2F0 – 0x2F7
0x2F8 – 0x2FF

 0x300 – 0x377
 0x378 – 0x3E7
C S
YCLE UPPORT
S
ASTER UPPORT
 0x3E8 – 0x3EF
0x3F0 – 0x3F7

 0x3F8 – 0x3FF
 0x400 – 0xAFF
PC104_IRQ_EN1 register. All four memory range
Interfaces and Connectors
41