Interfaces And Connectors; Sumit Connectors (J1-J2) - VersaLogic Ocelot Reference Manual

Distributor of VersaLogic Corporation: Excellent Integrated System Limited
Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com

SUMIT Connectors (J1-J2)

The SUMIT-A and SUMIT-B connectors (J2 and J1, respectively) provide expansion options by
supporting additional buses, as shown in Table 5 and Table 6. See the
complete description of the SUMIT interface.
Pin Signal Name
1 +5VSB
3 3.3V
5 3.3V
7 NC
9 NC
11 USB_OC#
13 Reserved
15 +5V
17 USB7+
19 USB7-
21 +5V
23 USB6+
25 USB6-
27 +5V
29 USB5+
31 USB5-
33 +5V
35 USB4+
37 USB4-
39 GND
41 A_PETp2
43 A_PETn2
45 GND
47 PERST#
49 WAKE#
51 +5V
.
VL-EPMs-21 Reference Manual

Interfaces and Connectors

Table 5: VL-EPMs-21 SUMIT-A Connector (J2) Pinout
Function
+5V power (common)
+3.3V power
+3.3V power
No connect
No connect
USB overcurrent flag
Reserved
+5V power
USB7 data +
USB7 data –
+5V power
USB6 data +
USB6 data –
+5V power
USB5 data +
USB5 data –
+5V power
USB4 data +
USB4 data –
Ground
Link A, lane 2 transmit +
Link A, lane 2 transmit –
Ground
Platform Reset
PCIe Wake
+5V power
SUMIT Specification
Pin Signal Name
2 +12V
4 SMB/I2C_DATA
6 SMB/I2C_CLK
8 SMB/I2C_ALERT#
10 SPI/uWire_DO
12 SPI/uWire_DI
14 SPI/uWire_CLK
16 SPI/uWire_CS0#
18 SPI/uWire_CS1#
20 NC
22 NC
24 LPC_AD0
26 LPC_AD1
28 LPC_AD2
30 LPC_AD3
32 LPC_FRAME#
34 SERIRQ#
36 NC
38 CLK_33MHz
40 GND
42 A_PERp2
44 A_PERn2
46 APRSNT#/GND
48 A_CLKp
50 A_CLKn
52 GND
5 5
for a
Function
+12V power
SMBus data
SMBus clock
SMBus interrupt line in
SPI master in slave out
SPI master out slave in
SPI clock
SPI slave select 5
SPI slave select 6
No connect
No connect
LPC address-data line 0
LPC address-data line 1
LPC address-data line 2
LPC address-data line 3
LPC frame
Serial IRQ legacy
No connect
LPC 33 MHz clock
Ground
Link A, lane 2 receive +
Link A, lane 2 receive –
Link A card present
Link A clock 0 +
Link A clock 0 -
Ground
26