Receiver - Nokia NSB-7 Series Service Manual

PAMS Technical Documentation

Receiver

Receiver is a direct conversion linear receiver. Received RF signal from antenna is fed via
Antenna Switch to the 1st RX SAW filter and a discrete LNA (Low Noise Amplifier). Gain
selection control of the LNA comes from HAGAR IC. Gain step is activated when RF level
in antenna is about -40 dBm.
After the LNA amplified signal (with low noise level) is fed to a bandpass filter (the 2nd
RX SAW filter). The RX filters define how good are the blocking characteristics against
spurious signals outside the receive band and the protection against spurious responses.
These bandpass filtered signals are then balanced with baluns. Differential RX signal is
amplified and mixed directly down to a BB frequency in HAGAR. Local Oscillator signal is
generated by an external VCO. The VCO signal is divided by 2. PLL and dividers are in
HAGAR IC.
From the mixer output to an ADC input RX signal is divided to I- and Q-signals. Accurate
phasing is generated by LO dividers. After the mixer DTOS amplifiers convert the differ-
ential signals to single ended. DTOS has two gain stages. The first one has constant gain
of 12dB and 85kHz cut off frequency. The gain of second stage is controlled by control
signal g10. If g10 is high (1) the gain is 6dB and if g10 is low (0) the gain is -4dB.
The active channel filters in HAGAR IC provides selectivity for channels (-3dB @ +/-100
kHz typ.). Integrated baseband filter is an active RC filter with two off-chip capacitors.
Long RC time constant needed in the channel selection filter of direct conversion
receiver is produced by large off-chip capacitors because the impedance levels could not
be increased due to noise specifications. The baseband filter consists of two stages, DTOS
and BIQUAD. DTOS is a differential to single-ended converter having 8dB or 18dB gain.
BIQUAD is a modified Sallen-Key Biquad.
Integrated resistors and capacitors are tunable. These are controlled by a digital control
word. The correct control words which compensate process variation of the integrated
resistors and capacitors and tolerance of the off-chip capacitors are found by a calibra-
tion circuit.
The next stage in receiver chain is an AGC amplifier - also integrated in HAGAR. The AGC
has a digital gain control via serial bus from COBBA IC. The AGC stage provides gain con-
trol range of 40 dB (10 dB steps) for the receiver and also necessary DC compensation.
The 10 dB AGC step is implemented by DTOS stages.
The DC compensation is made during DCN1 and DCN2 operations (controlled via serial
bus). DCN1 is carried out by charging large external capacitors in the AGC stages to a
voltage which cause a zero dc-offset. DCN2 sets the signal offset to a constant value
(RXREF 1.2 V). The RXREF signal (from COBBA GJP) is used as a zero level to RX ADCs.
Single ended filtered I/Q-signal is finally fed to the ADCs of COBBA. The input level for
ADC is 1.4 Vpp max.
Issue 1 06/00
Figure 16: Phase Locked Loop
ãNokia Mobile Phones Ltd.
NSB-7
System Module
Page 55