Nokia NSB-7 Series Service Manual page 43

PAMS Technical Documentation
The MAD2 operates from a 13 MHz system clock, which is generated from the 13Mhz
VCXO frequency. The MAD2 supplies a 6,5 MHz or a 13 MHz internal clock for the MCU
and system logic blocks and a 13 MHz clock for the DSP, where it is multiplied to 45.5
MHz DSP clock. The system clock can be stopped for a system sleep mode by disabling
the VCXO supply power from the CCONT regulator output. The CCONT provides a 32 kHz
sleep clock for internal use and to the MAD2, which is used for the sleep mode timing.
The sleep clock is active when there is a battery voltage available i.e. always when the
battery is connected.
MAD2WD1 supply voltages are VBB and VCORE (V2V), VBB feed I/O pins so that
MAD2WD1 is externally fully compatible with old versions. VCORE feed MAD2WD1
internal functions supply voltage; CPU, DSP and system logic.
Pin
Pin Name
No:
A1
MCUGemIO 0
C2
LEADGND
D2
Col4
D3
Col3
H11
MCUGenIO1
E4 GND
D4
Col2
C4
Col1
C3
Col0
D1
LCDCSX
E1
LEADVCC
F12
LoByteSelX
Issue 1 06/00
Connecte
Pin Drive
d to/
Type req. mA
from
O 2
I/O UIF 2
I/O UIF 2
I/O 2
I/O UIF 2
I/O UIF 2
I/O UIF 2
I/O UIF 2
ãNokia Mobile Phones Ltd.
Reset
Note
State
0
Input Programma-
ble pullup
PR0201
Input Programma-
ble pullup
PR0201
Input, Pullup
pullup PR0201
Input Programma-
ble pullup
PR0201
Input programma-
ble pullup
PR0201
Input programma-
ble pullup
PR0201
Input external pul-
lup/down
NSB-7
System Module
Explanation
MCU General pur-
pose output port
Lead Ground
I/O line for keyboard
column 4
I/O line for keyboard
column 3
General purpose I/O
port
Ground
I/O line for keyboard
column 2
I/O line for keyboard
column 1
I/O line for keyboard
column 0
serial LCD driver chip
select, parallel LCD
driver enable
Lead Power
NC
Page 29