Procomp BVD2A Manual page 40

BVD2A
SDRAM Cycle Length
This item defines the number of CPU cycles between SDRAM refresh. The
refreshment may be not complete and data can be lost when insufficient time is
allowed. We recommend that you leave this item at the default value 3.
SDRAM Bank Interleave
This item sets the SDRAM internal multi-bank function, from 2-banks ~
4-banks.
DRAM Clock
This item sets your DRAM clock; you can use this item to select the value of
DRAM clock. We recommend that you leave this item at the default value Host
CLK, which means the DRAM clock duplicates the system clock speed.
Memory Hole
In order to improve performance, certain space in memory can be reserved for
ISA cards. This memory must be mapped into the memory below 16MB.
P2C/C2P Concurrency
Use this item to enable or disable concurrent memory/PCI and CPU action.
Fast R-W Turn Around
This item sets a timing parameter for CPU access. Since the CPU timing is
determined by the system hardware, you can set this item to Disabled.
System BIOS Cacheable
System BIOS segment is cacheable if this item has been enabled.
Video RAM Cacheable
Video RAM segment is cacheable if this item has been enabled.
AGP Aperture Size (MB)
Select the size of the AGP aperture. The aperture is a portion of the PCI
memory address range dedicated for graphics memory address space. A host
cycle that hits the aperture range is forwarded to the AGP without any
translation. The choice is 4, 8, 16, 32, 64, 128, or 256.
AGP-4X Mode
This item allows you to improve video performance by quadrupling the speed
of the AGP bus. This function is supported by the mainboard, so we
recommend that you set this item to enabled.
Default: 3
Default: 4 Bank
Default: Host CLK
Default: Disabled
Default: Enabled
Default: Disabled
Default: Enabled
Default: Enabled
Default: 64
Default: Enabled
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