2-Pin Dap Mode; Fig. 7-1 2-Pin Dap Mode Timing; Fig. 7-2 3-Pin Dap Mode Timing - ETAS FETK-S1.1 User Manual

Emulator probe for infineon aurix mcu family
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ETAS
7.8.1

2-Pin DAP Mode

DAP0_(ETK)
DAP1_(ETK)
DAP1_(ECU)
Fig. 7-1
Parameter
DAP0 Clock Period (typ.)
(ETK --> Target)
DAP1 Set-Up Time
(ETK --> Target)
DAP1 Hold Time
(ETK --> Target)
DAP1 Clock-to-Out Time
(Target --> ETK)
DAP1 Valid Window
(Target --> ETK)
7.8.2
3-Pin DAP Mode
DAP1, DAP2_(ETK)
DAP1, DAP2_(ECU)
Fig. 7-2
Parameter
DAP0 Clock Period (typ.)
(ETK --> Target)
DAP1/DAP2 Set-Up
Time ETK --> Target)
DAP1/DAP2 Hold Time
(ETK --> Target)
DAP1/DAP2 Clock-to-
Out Time (Target -->
ETK)
FETK-S1.1 - User's Guide
t
2-Pin DAP Mode Timing
Symbol
t
CLK
t
SU
t
H
t
CO
t
Valid
DAP0_(ETK)
3-Pin DAP Mode Timing
Symbol
t
CLK
t
SU
t
H
t
CO
t
CLK
t
SU
H
t
CO
Value [ns]
Comment
10
100 MHz DAP Clock Fre-
quency
20
50 MHz DAP Clock Fre-
quency
4
2
~
Undetermined, ETK auto-
matically determines
optimum sampling point
8
t
CLK
t
t
SU
H
t
CO
Value [ns]
Comment
6.25
160 MHz DAP Clock Fre-
quency
20
50 MHz DAP Clock Fre-
quency
4
2
~
Undetermined, ETK auto-
matically determines
optimum sampling point
Technical Data
t
Valid
t
Valid
41

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