Features - ETAS FETK-S1.1 User Manual

ETAS
3.2

Features

General
• Gigabit Ethernet Interface:
– Connection to PC via ES89x modules
– Proprietary Ethernet protocol for FETKs
– Supports a variety of standard applications
• Calibration tool access performed via the microcontroller DAP interface
– 3.3 V DAP output levels, 5.0 V tolerant DAP input
– Configurable DAP interface modes:
• Permanent storage of configuration in EEPROM
• Third party MC-tool support via ES89x module possible
Measurement
• Fast measurements (DISTAB) – ECU raster at under 50 µs
• Measurement via Trace2Ram for low ECU runtime impact and fast ras-
ters down to 10 µs
• Supports "turnkey mechanism" - measurement start immediately after
"Ignition on" and proceed measurement during ECU reset
• Pin-less ECU handshake and trigger mechanism
• Hook-based (DISTAB) and hook-less measurement approaches
Calibration
• Concurrent use of calibration and measurement performed via micro-
controller debug interface
• Working Page & Reference Page (2 page concept) realized by microcon-
troller overlay mechanism
• Direct access to parameters, curves, and maps in internal RAM
• Microcontroller capability of internal Flash emulation can be used
• FETK powers Emulation Device RAM (for calibration purpose)
• Supports "Start on Any Page"
• Supports special coldstart mechanism ("Calibration Wake Up"):
– Calibration Wake Up: Wake up mechanism to wake up the power sup-
– Pull CalWakeUp until Startup Handshake: duration of the Wake up
ECU Flash Programming via FETK
• Using microcontroller debug interface, ECU software support not neces-
sary
• Braindead flashing under ProF control
FETK-S1.1 - User's Guide
2-pin DAP mode, clock speed 50 MHz and100 MHz)
3-pin DAP mode (wide mode), clock speed 100 MHz and 160 MHz
ply of the ECU via the Calibration Wake up pin
mechanism is configurable
Introduction
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