Fujitsu FR Series Application Note page 12

Available settings for CMPR (CMPR):
- The available settings depend on the specific device. They are listed in the corresponding
data sheet. Below some values for the MB91F467DA are listed.
For the whole table and the latest inforomation, see the data sheet.
Modulation Random No
Degree
(k) (N)
1 3
1 3
1 5
2 3
1 3
1 5
2 3
1 3
1 5
1 7
2 3
3 3
1 3
1 5
1 7
1 9
2 3
2 5
3 3
4 3
1 3
1 5
1 7
1 9
2 3
2 5
3 3
4 3
... ...
Note: If the CLKCAN source is set either to main oscillator or to PLLx output then the clock
for the CAN is not influenced by the clock modulation. If the CLKCAN source is set
CPU clock (CLKB) then the clock for the CAN is also modulated if the clock
modulator is enabled.
Note: If the clock modulator is enabled, the wait states of the internal flash wait states must
be adapted to maximum frequency. Check the wait states settings in this case.
Note: This feature is not supported by every device. Check the data sheet if this feature is
available..
Example:
The clock modulator should be enabled and the value of the CMPR should be set to 0x026F.
#set CLOMO
#set CMPR
MCU-AN-300021-E-V10
Start91460.asm
Chapter 2 Settings of the Start91460.asm
CMPR Base Clock
[hex]
026F
026F
02AE
046E
026F
02AE
046E
026F
02AE
02ED
046E
066D
026F
02AE
02ED
032C
046E
04AC
066D
086C
026F
02AE
02ED
032C
046E
04AC
066D
086C
...
ON ; <<< Enable /disable clock modulator
0x026F ; <<< Ref. to the data sheet, CMPR
- 12 -
Fmin
[MHz] [MHz]
84 76.1
80 72.6
80 68.7
80 68.7
76 69.1
76 65.3
76 65.3
72 65.5
72 62
72 58.8
72 62
72 58.8
68 62
68 58.7
68 55.7
68 53
68 58.7
68 53
68 55.7
68 53
64 58.5
64 55.3
64 52.5
64 49.9
64 55.3
64 49.9
64 52.5
64 49.9
... ...
© Fujitsu Microelectronics Europe GmbH
Fmax
[MHz]
93.8
89.1
95.8
95.8
84.5
90.8
90.8
79.9
85.8
92.7
85.8
92.7
75.3
80.9
87.3
95
80.9
95
87.3
95
70.7
75.9
82
89.1
75.9
89.1
82
89.1
...