Xilinx Virtex-7 FPGA VC7203 Getting Started Manual page 34

Chapter 1: VC7203 IBERT Getting Started Guide
X-Ref Target - Figure 1-27
11. In the new window, select Tools > Run Tcl Script. In the Run Script window, navigate
34
Figure 1-27: Open Example Design
to add_scm2.tcl in the extracted files and press OK. The SuperClock-2 Module
Design Sources and Constraints are automatically added to the example design
(Figure 1-28).
www.xilinx.com VC7203 IBERT Getting Started Guide
UG847 (v3.0) July 10, 2013