Xilinx Virtex-7 FPGA VC7203 Getting Started Manual page 13

5.
X-Ref Target - Figure 1-9
There is one IBERT demonstration design for each GTX Quad on the VC7203 board, for a
total of seven IBERT designs. An additional design is provided to demonstrate the
USB/UART interface (details of this demonstration are described in the README file on the
SD card). All eight designs are organized and stored on the SD card as shown in
Table 1-1: SD Card Contents and Configuration Addresses
VC7203 IBERT Getting Started Guide
UG847 (v3.0) July 10, 2013
ADR2 = ON, ADR1 = OFF, and ADR0 = ON. The MODE bit (switch position 4) is not
used and can be set either ON or OFF.
Place the main power switch SW1 to the ON position.
Figure 1-9: Configuration Address DIP Switch (SW8)
Demonstration
Design
GTX Quad 113
GTX Quad 114
GTX Quad 115
GTX Quad 116
GTX Quad 117
GTX Quad 118
GTX Quad 119
USB/UART
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Running the GTX IBERT Demonstration
SYSACE-2 CFG
SW8
ADR0
ADR1
ADR2
MODE
UG847_c1_09_110112
ADR2 ADR1
ON ON
ON ON
ON OFF
ON OFF
OFF ON
OFF ON
OFF OFF
OFF OFF
Table 1-1.
ADR0
ON
OFF
ON
OFF
ON
OFF
ON
OFF
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