Xilinx Virtex-7 FPGA VC7203 Getting Started Manual page 33

X-Ref Target - Figure 1-26
10. Back to Manage IP, in the Sources window, right-click the IBERT IP and select Open IP
VC7203 IBERT Getting Started Guide
UG847 (v3.0) July 10, 2013
Figure 1-26: Customize IP - Clock Settings
Example Design (Figure
design opens in a new Vivado design tools window.
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1-27). Specify a location to save the design, press OK, and the
Creating the GTX IBERT Core
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