Setting Up The Vc7215 Board - Xilinx Virtex-7 FPGA VC7215 Getting Started Manual

Chapter 1: VC7215 IBERT Getting Started Guide
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The hardware and software required to rebuild the IBERT demonstration designs are:
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Setting Up the VC7215 Board

This section describes how to set up the VC7215 board.
Caution!
ESD prevention measures when handling the board.
When the VC7215 board ships from the factory, it is configured for the GTH IBERT
demonstrations described in this document. If the board has been re-configured it must be
returned to the default setup before running the IBERT demonstrations.
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Host PC with:
• SD card reader
• USB ports
Vivado Design Suite 2014.4
Vivado Design Suite 2014.4
PC with a version of the Windows operating system supported by Vivado Design
Suite
The VC7215 board can be damaged by electrostatic discharge (ESD). Follow standard
Move all jumpers and switches to their default positions. The default jumper and
switch positions are listed in VC7215 Virtex-7 FPGA GTH Transceiver Characterization
Board User Guide (UG972)
Install the two GTH transceiver power modules by plugging them into connectors J66
and J97, and connectors J10 and J72.
Install the SuperClock-2 module:
a. Align the three metal standoffs on the bottom side of the module with the three
mounting holes in the SUPERCLOCK-2 MODULE interface of the VC7215 board.
b. Using three 4-40 x 0.25 inch screws, firmly screw down the module from the
bottom of the VC7215 board.
c. On the SuperClock-2 module, place a jumper across pins 2–3 (2V5) of the
CONTROL VOLTAGE header, J18, and place another jumper across Si570 INH
header J11.
d. Screw down a 50Ω SMA terminator onto each of the six unused Si5368 clock
output SMA connectors: J7, J8, J12, J15, J16 and J17.
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[Ref 1].
VC7215 Getting Started Guide
UG970 (v7.0) November 24, 2014