Changes To Table 87 - Analog Devices ADV7181B Manual

ADV7181B
Mode 3 525i/625i YPrPb Input (Y on AIN1, Pr on AIN3, and Pb on AIN5)
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P15 to P8.
Table 88. Mode 3 YPrPb Input 525i/625i
Register Address Register Value
0x00 0x0A
0x1D 0x40
0x0F 0x40
0x3D 0xC3
0x3F 0xE4
0x50 0x04
0xC3 0xC9
0xC4 0x8D
0x0E 0x80
0x52 0x18
0x58 0xED
0x77 0xC5
0x7C 0x93
0x7D 0x00
0x90 0xC9
0x91 0x40
0x92 0x3C
0x93 0xCA
0x94 0xD5
0xCF 0x50
0xD0 0x4E
0xD6 0xDD
0xE5 0x51
0xD5 0xA0
0xE4 0x3E
0xE9 0x3E
0x0E 0x00
Notes
YPrPb input.
Enable 28 MHz crystal.
TRAQ.
MWE enable manual window.
BGB to 36.
Set DNR threshold.
Manual mux AIN1 to ADC0 (1001), AIN3 to ADC1 (1100).
Enable manual muxing, Man mux AIN5 to ADC2 (1101).
ADI recommended programming sequence. This sequence must be followed exactly when
setting up the decoder.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Recommended setting.
Rev. B | Page 90 of 100