Changes To Table 85 - Analog Devices ADV7181B Manual

Multiformat sdtv video decoder
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ADV7181B
Table 85. Common and Normal (Page 1) Register Map Details
Subaddress
Register
Bit Description
0x00
Input
INSEL[3:0]. The INSEL bits allow the
Control
user to select an input channel as
well as the input format.
VID_SEL[3:0]. The VID_SEL bits allow
the user to select the input video
standard.
0x01
Video
Reserved.
Selection
ENVSPROC.
Reserved.
BETACAM.
ENHSPL.
Reserved.
Bits
7 6
5
4 3
2
1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
0 0
0
0
0 0
0
1
0 0
1
0
0 0
1
1
0 1
0
0
0 1
0
1
0 1
1
0
0 1
1
1
1 0
0
0
1 0
0
1
1 0
1
0
1 0
1
1
1 1
0
0
1 1
0
1
1 1
1
0
1 1
1
1
0
0
0
1
0
0
1
0
1
1
Rev. B | Page 72 of 100
Comments
0
0
Composite
1
Reserved
0
Reserved
1
Reserved
0
Reserved
1
Reserved
0
S-Video
1
Reserved
0
Reserved
1
YPrPb
0
Reserved
1
Reserved
0
Reserved
1
Reserved
0
Reserved
1
Reserved
Autodetect PAL
(B/G/H/I/D), NTSC
(without pedestal), SECAM
Autodetect PAL
(B/G/H/I/D), NTSC-M (with
pedestal), SECAM
Autodetect PAL (N), NTSC
(M) (without pedestal),
SECAM
Autodetect PAL (N), NTSC
(M) (with pedestal),
SECAM
NTSC-J
NTSC-M
PAL60
NTSC-4.43
PAL-B/G/H/I/D
PAL-N (B/G/H/I/D without
pedestal)
PAL-M (without pedestal)
PAL-M
PAL-combination N
PAL-combination N
SECAM (with pedestal)
SECAM (with pedestal)
0
Set to default
Disable Vsync processor
Enable Vsync processor
Set to default
Standard video input
Betacam input enable
Disable Hsync processor
Enable Hsync processor
Set to default
Notes

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