Analog Devices ADV7181B Manual page 48

ADV7181B
Table 57. WSS Access Information
Signal Name
WSS1[7:0]
WSS2[5:0]
Table 58. EDTV Access Information
Signal Name
EDTV1[7:0]
EDTV2[7:0]
EDTV3[7:0]
CGMS Data Registers
CGMS1[7:0], Address 0x96[7:0]
CGMS2[7:0], Address 0x97[7:0]
CGMS3[7:0], Address 0x98[7:0]
Figure 32 shows the bit correspondence between the analog
video waveform and the CGMS1/CGMS2/CGMS3 registers.
CGMS3[7:4] are undetermined and should be masked out by
software.
+100 IRE
+70 IRE
0 IRE
–40 IRE
Register Location
WSS 1[7:0]
WSS 2[5:0]
EDTV1[7:0]
0 1 2
3 4 5 6
Figure 31. EDTV Data Extraction
Register Location
EDTV 1[7:0]
EDTV 2[7:0]
EDTV 3[7:0]
REF
0
11.2μs
±
2.235μs 20ns
Figure 32. CGMS Data Extraction
Address
145d 0x91
146d 0x92
EDTV2[7:0] EDTV3[5:0]
7 0 1 2 3 4 5 6 7 0 1 2
Address
147d 0x93
148d 0x94
149d 0x95
Closed Caption Data Registers
CCAP1[7:0], Address 0x99[7:0]
CCAP2[7:0], Address 0x9A[7:0]
Figure 33 shows the bit correspondence between the analog
video waveform and the CCAP1/CCAP2 registers.
CCAP1[7] contains the parity bit from the first word.
CCAP2[7] contains the parity bit from the second word.
Refer to the GDECAD Gemstar Decode Ancillary Data Format,
Address 0x4C[0] section.
CGMS1[7:0]
1 2 3 4 5 6 7 0 1
49.1μs
Rev. B | Page 48 of 100
Register Default Value
Readback only
Readback only
NOT SUPPORTED
3 4 5
Register Default Value
Readback only
Readback only
Readback only
CGMS2[7:0] CGMS3[3:0]
2 3 4 5 6 7 0 1 2
±
0.5μs
CRC SEQUENCE
3