Parallel Poll - Agilent Technologies HP 16500B Manual

Status Reporting

Parallel Poll

variable called Stat. At that time bit 6 of the variable Stat can be tested to
see if it is set (bit 6 = 1).
The serial poll operation can be conducted in the following manner:
Enable interrupts on the bus. This allows the controller to see the
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SRQ line.
Disable interrupts on the bus.
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If the SRQ line is high (some instrument is requesting service) then
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check the instrument at address 1 to see if bit 6 of its status register is
high.
To check whether bit 6 of an instruments status register is high, use
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the following BASIC statement•: IF BIT (Stat, 6) THEN
If bit 6 of the instrument at address 1 is not high, then check the
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instrument at address 7 to see if bit 6 of its status register is high.
As soon as the instrument with status bit 6 high is found check the
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rest of the status bits to determine what is required.
The SPOLL(707) command causes much more to happen on the bus than
simply reading the register. This command clears the bus automatically,
addresses the talker and listener, sends SPE (serial poll enable) and SPD
(serial poll disable) bus commands, and reads the data. For more
information about serial poll, refer to your controller manual, and
programming language reference manuals.
After the serial poll is completed, the RQS bit in the HP 16500B Logic
Analysis System Status Byte Register will be reset if it was set. Once a bit in
the Status Byte Register is set, it will remain set until the status is cleared
with a *CLS command, or the instrument is reset.
Parallel Poll
Parallel poll is a controller initiated operation which is used to obtain
information from several devices simultaneously. When a controller initiates
a Parallel Poll, each device returns a Status Bit via one of the DIO data lines.
Device DIO assignments are made by the controller using the PPC (Parallel
Poll Configure) sequence. Devices respond either individually, each on a
separate DIO line; collectively on a single DIO line; or any combination of
these two ways. When responding collectively, the result is a logical AND
(True High) or logical OR (True Low) of the groups of status bits.
6–8
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