Xilinx KCU1250 User Manual page 63

set_property PACKAGE_PIN AD1
set_property PACKAGE_PIN AG4
set_property PACKAGE_PIN AG3
set_property PACKAGE_PIN AF2
set_property PACKAGE_PIN AF1
set_property PACKAGE_PIN AH6
set_property PACKAGE_PIN AH5
set_property PACKAGE_PIN AH2
set_property PACKAGE_PIN AH1
set_property PACKAGE_PIN T6
set_property PACKAGE_PIN T5
set_property PACKAGE_PIN V6
set_property PACKAGE_PIN V5
set_property PACKAGE_PIN R4
set_property PACKAGE_PIN R3
set_property PACKAGE_PIN P2
set_property PACKAGE_PIN P1
set_property PACKAGE_PIN U4
set_property PACKAGE_PIN U3
set_property PACKAGE_PIN T2
set_property PACKAGE_PIN T1
set_property PACKAGE_PIN W4
set_property PACKAGE_PIN W3
set_property PACKAGE_PIN V2
set_property PACKAGE_PIN V1
set_property PACKAGE_PIN AA4
set_property PACKAGE_PIN AA3
set_property PACKAGE_PIN Y2
set_property PACKAGE_PIN Y1
set_property PACKAGE_PIN M6
set_property PACKAGE_PIN M5
set_property PACKAGE_PIN P6
set_property PACKAGE_PIN P5
set_property PACKAGE_PIN G4
set_property PACKAGE_PIN G3
set_property PACKAGE_PIN F2
set_property PACKAGE_PIN F1
set_property PACKAGE_PIN J4
set_property PACKAGE_PIN J3
set_property PACKAGE_PIN H2
set_property PACKAGE_PIN H1
set_property PACKAGE_PIN L4
set_property PACKAGE_PIN L3
set_property PACKAGE_PIN K2
set_property PACKAGE_PIN K1
set_property PACKAGE_PIN N4
set_property PACKAGE_PIN N3
set_property PACKAGE_PIN M2
set_property PACKAGE_PIN M1
set_property PACKAGE_PIN H6
set_property PACKAGE_PIN H5
set_property PACKAGE_PIN K6
set_property PACKAGE_PIN K5
set_property PACKAGE_PIN B6
set_property PACKAGE_PIN B5
set_property PACKAGE_PIN A4
set_property PACKAGE_PIN A3
set_property PACKAGE_PIN C4
set_property PACKAGE_PIN C3
KCU1250 User Guide
UG1057 (v1.0) December 19, 2014
Appendix Appendix C: Master Constraints File Listing
[get_ports "225_RX2_N"]
[get_ports "225_TX1_P"]
[get_ports "225_TX1_N"]
[get_ports "225_RX1_P"]
[get_ports "225_RX1_N"]
[get_ports "225_TX0_P"]
[get_ports "225_TX0_N"]
[get_ports "225_RX0_P"]
[get_ports "225_RX0_N"]
[get_ports "226_REFCLK1_P"]
[get_ports "226_REFCLK1_N"]
[get_ports "226_REFCLK0_P"]
[get_ports "226_REFCLK0_N"]
[get_ports "226_TX3_P"]
[get_ports "226_TX3_N"]
[get_ports "226_RX3_P"]
[get_ports "226_RX3_N"]
[get_ports "226_TX2_P"]
[get_ports "226_TX2_N"]
[get_ports "226_RX2_P"]
[get_ports "226_RX2_N"]
[get_ports "226_TX1_P"]
[get_ports "226_TX1_N"]
[get_ports "226_RX1_P"]
[get_ports "226_RX1_N"]
[get_ports "226_TX0_P"]
[get_ports "226_TX0_N"]
[get_ports "226_RX0_P"]
[get_ports "226_RX0_N"]
[get_ports "227_REFCLK1_P"]
[get_ports "227_REFCLK1_N"]
[get_ports "227_REFCLK0_P"]
[get_ports "227_REFCLK0_N"]
[get_ports "227_TX3_P"]
[get_ports "227_TX3_N"]
[get_ports "227_RX3_P"]
[get_ports "227_RX3_N"]
[get_ports "227_TX2_P"]
[get_ports "227_TX2_N"]
[get_ports "227_RX2_P"]
[get_ports "227_RX2_N"]
[get_ports "227_TX1_P"]
[get_ports "227_TX1_N"]
[get_ports "227_RX1_P"]
[get_ports "227_RX1_N"]
[get_ports "227_TX0_P"]
[get_ports "227_TX0_N"]
[get_ports "227_RX0_P"]
[get_ports "227_RX0_N"]
[get_ports "228_REFCLK1_P"]
[get_ports "228_REFCLK1_N"]
[get_ports "228_REFCLK0_P"]
[get_ports "228_REFCLK0_N"]
[get_ports "228_TX3_P"]
[get_ports "228_TX3_N"]
[get_ports "228_RX3_P"]
[get_ports "228_RX3_N"]
[get_ports "228_TX2_P"]
[get_ports "228_TX2_N"]
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