Limitations; Analog Input, Output, Vref; Sram Device - ST STM32L4R9I-EVAL User Manual

UM2248
Element
R204
SB48
6.18.3

Limitations

The OpAmp1 is exclusive with MFX, OctoSPIP1, and MC operation.
The Comp2 is exclusive with the debugging connector and SAI1.
6.19

Analog input, output, VREF

STM32L4R9AII6 provides onboard analog-to-digital converter ADC, and digital-to-analog
converter DAC. The port PA4 is configurable to operate either as ADC input or as DAC
output. PA4 is routed to the two-way header CN4 allowing to fetch signals to or from PA4 or
to ground it by fitting a jumper into CN4.
Parameters of the ADC input low-pass filter formed with R31 and C21 are adjustable by
replacing these components according to application requirements. Similarly, parameters of
the DAC output low-pass filter formed with R32 and C21 are modifiable by replacing these
components according to application requirements.
The VREF+ terminal of STM32L4R9AII6 is used as the reference voltage for both ADC and
DAC. By default, it is routed to VDDA through a jumper fitted into the two-way header CN10.
The jumper is removable and an external voltage applied to the terminal 1 of CN10, for
specific purposes.
6.20

SRAM device

IS61WV102416BLL, a 16-Mbit static RAM (SRAM), 1 M x 16 bit, is fitted on the
STM32L4R9I-EVAL main board, in U17 position. The STM32L4R9I-EVAL main board, as well
as the addressing capabilities of FMC, allow hosting SRAM devices up to 64 Mbytes. This is
the reason why the schematic diagram mentions several SRAM devices.
The SRAM device is attached to the 16-bit data bus and accessed with FMC. The base
address is 0x6000 0000, corresponding to NOR/SRAM1 bank1. The SRAM device is
selected with the FMC_NE1 chip select. FMC_NBL0 and FMC_NBL1 signals allow
selecting
8-bit and 16-bit data word operating modes.
By removal of R134, a zero-ohm resistor, the SRAM is deselected and the STM32L4R9AII6
ports PD7, PE0, and PE1 corresponding to FMC_NE1, FMC_NBL0, and FMC_NBL1
signals, respectively, are usable for other application purposes.
Table 13. Configuration elements related to Comp2 (continued)
Setting
R204 out
Comp2_OUT is routed to pin PB5 of STM32L4R9AII6.
SB48 open
Default setting.
R204 in
Comp2_OUT is not routed to pin PB4 of STM32L4R9AII6. PB4
SB48 closed
port of STM32L4R9AII6 is routed to SAI1_SDB.
UM2248 Rev 4
Hardware layout and configuration
Configuration
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