RZ/G1E SODIMM Development Platform Hardware User Guide
Pin
SODIMM Edge Connector Signal
No.
Name
58
NC
59
NC
60
VIN_3V3
61
SSI_SDATA4(GP5_9)
62
ETH_RXD0/VI1_DATA1(GP5_13)¹
²
63
EXP_VI1_DATA3(GP5_15)¹ ²
64
SCIF1_SCK(GP4_13)
65
GND
66
ETH_RX_ER/VI1_DATA0(GP5_12)¹
²
67
SSI_SDATA3(GP5_6)
68
MSIOF0_RXD/SCIF5_RXD(GP4_2)
69
NC
70
ETH_RXD1/VI1_DATA2(GP5_14)¹
²
71
MSIOF1_SS2(GP0_29/MD6)
72
VIN_3V3
73
MSIOF0_SCK(GP4_4)
iWave Systems Technologies Pvt. Ltd.
Signal Type/
Termination
IO, 3.3V CMOS
IO, 3.3V CMOS
O, 3.3V Power
O, 3.3V CMOS
O, 3.3V CMOS
O, 3.3V CMOS
I, 3.3V CMOS
Power
O, 3.3V CMOS
I, 3.3V CMOS
I, 3.3V CMOS
-
O, 3.3V CMOS
I, 3.3V CMOS
O, 3.3V Power
O, 3.3V CMOS
10K PU
Description
NC in carrier board.
GPIO(GP4_22) signal from RZ/G1E CPU is
optionally connected to this pin.
NC in carrier board.
GPIO(GP4_23) signal from RZ/G1E CPU is
optionally connected to this pin.
Supply Voltage.
SSI Audio receive data.
This pin is connected from I2S audio codec.
VIN1 Parallel Camera Data1.
This pin is connected from camera connector
J7.
VIN1 Parallel Camera Data3.
This pin is connected from camera connector
J7.
SCIF1 Synchronous clock output.
This pin is optionally connected to I2S audio
codec SYS_MCLK pin through resistor and
default not populated.
Ground.
VIN1 Parallel Camera Data0.
This pin is connected from camera connector
J7.
Audio Transmit data.
This pin is connected to I2S audio codec.
General Purpose Input/output.
This pin is connected to CAN1 Transceiver
Power down control.
NC in carrier board.
GPIO(GP4_3) signal from RZ/G1E CPU is
optionally connected to this pin.
VIN1 Parallel Camera Data2.
This pin is connected from camera connector.
This signal is also connected to Expansion
Header J12 Pin 15.
MSIOF1 Chip select signal.
This signal is connected to Expansion Header
J12 Pin 16.
Supply Voltage.
General Purpose Input/Output.
This pin is connected from Touch Controller
Interrupt.
REL1.1
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