Automation Connector Header J59; Figure 25 J59 Automation Connector Header - Intrinsyc Lantronix Open-Q 820 User Manual

Development kit for qualcomm apq8096 processor
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3.8.23 Automation Connector Header J59

This header is used for automating tests on the development platform. Such tests include powering on and off
and managing automated software downloads on the board. If automation is not required, user can access
free GPIO pins from this header. Table 3.8.23-1 below outlines the pins that are available via header J59.
Please refer to carrier and SOM schematics for details on where signals are connected to.
Description
Power rail to support I2C
signals coming from an
external source
I2C
clock
signal
from
external
source
to
Semtech GPIO expander
I2C data line to Semtech
GPIO expander
Negative
power
sense
line from Arm Energy
Probe J86
When asserted high, this
net drives the PMI8996
hardware input reset
signal (BTN_RESET_N)
low
Open-Q™ 820 Dev Kit User Guide

Figure 25 J59 Automation Connector Header

Table 3.8.23-1. General System J59 Pin Out
Signal
Pin
NO
CONFIG_I2C_PWR
J26[1]
CONFIG_I2C_SCL
J26[3]
CONFIG_I2C_SDA
J26[5]
SOM_PWR_SENSE_
J26[7]
N
TC_RESET
J26[9]
Description
Signal
GND
GND
GND
GND
Positive power sense line
SOM_PWR_SENSE_
from Arm Energy Probe
P
J86
When asserted high, this
TC_START
net drives the PON
hardware signal input
(BTN_PHONE_ON_N)
low, initiating the PON
sequence.
When asserted high, this
TC_POWER_OFF
net drives the system
power off net
(SYS_PWR_OFF_N) low.
Open-Q™ 820 Development Kit
Pin
NO
J26[2]
J26[4]
J26[6]
J26[8]
J26[10
]
49

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