Siemens Add 7 AddFEM Manual page 73

Technical Data
Bit
Pos.
7
6
5
4
3
2
1
0
Legend: * Is not set in the error weighting via the PROFIBUS DP telegram
Floating–point Representation of the Counter Values in IEEE 754 Format (32 Bits =
4 Bytes):
Byte address
Meaning
Meaning of the individual bits:
S Preceding sign bit
0: Positive / 1: Negative
E Exponent
Two's–complement representation with a fixed offset of 127
M Mantissa 24 bits
The most significant bit is always 1 and is not represented. The least significant bit
of the exponent is displayed at the corresponding bit position.
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Error Weighting Structure
Signal Meaning
ZRV Forced reserve specification manual
Is set when operating mode switch = STOP
e.g. due to repairs.
BGF Module fault
Grave fault. Hardware fault
e.g.: power failure, memory error, etc.
Restart of the AddFEM
ZTA Central unit failure
Higher–level fault. E.g. central unit or PROFIBUS DP failure.
KF Channel error
Lower–level or externally initiated channel fault. The number of channel
errors is supplied in the additional byte "Channel error weighting".
RES Reserve
RES Reserve
RES Reserve
MRV* Master state specification request
The automation processor specifies the master state of the AddFEM as the
"higher–level referee".
=1 –> Automation processor requests: AddFEM is reserve
=0 –> Automation processor requests: AddFEM is master
+3 +2
SEEE EEEE EMMM MMMM
+1 +0
MMMM MMMM MMMM MMMM
C79000–G8076–C900–03
AddFEM
AddFEM