Vga Interface - Lattice Semiconductor LatticeMico32/DSP User Manual

Lattice Semiconductor
Table 15. Connections Between the USB Controller (CY7C68013A) and the MachXO Device (Continued)
56
52
23
25
100
41
43

VGA Interface

The board includes a VGA connector for driving a VGA monitor. The VGA interface is connected to a 15-pin plug
socket. The pin definitions are listed in Table 16.
VGA RD0 and VGA RD1 are both connected to pin 1, but have different series resistors (see Figure 5). Thus, a 6-
bit VGA interface is realized. Figure 5 shows the connection of the RGB signals. The FPGA is responsible for gen-
erating correct HSYNC and VSYNC sweep frequencies. Understand the SYNC frequencies of the VGA monitor
being connected to the VGA plug and adjust the FPGA frequencies as required.
Table 16. VGA Connector X1B Pin Definition, n.c. ... Not Connected
Pin
1
2
3
4
6
8
10
12
14
Figure 5. VGA Connector
GP CTL2 C2
GP CTL4 B2
GP T0 M2
GP T2 P1
USB CLK O M7
GP RXD0 E13
GP RXD1 F13
Signal Name FPGA Pin
VGA RD0 A3
VGA GR0 A4
VGA BL0 A5
n.c. —
GND —
GND —
GND —
n.c. —
VGA VSYNC A6
LatticeMico32/DSP Development Board
51 GP CTL3
76 GP CTL5
24 GP T1
28 GP BKPT
26 GP IFCLK
40 GP TXD0
42 GP TXD1
Pin Signal Name
1 VGA RD1
2 VGA GR1
3 VGA BL1
5 n.c.
7 GND
9 n.c.
11 n.c.
13 VGA HSYNC
15 n.c.
13
User's Guide
C1
B1
N1
F12
M8
E14
F14
FPGA Pin
B4
B5
B6
—
—
—
—
A7
—