Key Matrix - Lattice Semiconductor LatticeMico32/DSP User Manual

Lattice Semiconductor

Key Matrix

The board also features a key matrix with 12 push-buttons, which are not debounced. They must be driven with
three column lines and can be read with four rows. The following table shows the connections.
Table 20. Key Matrix with the Keys SW302 ... SW313 Definition
Table 21. Key Matrix with the Keys SW302 ... SW313 Connection
To query all keys of the matrix, you must poll the column driver signals (TST COL0, TST COL1, and TST COL2). If
you press a key, a logic '1' appears in the corresponding row. The following diagram explains the functionality:
Figure 7. Polling of the Key Matrix
You do not need the polling method if only four keys are used. Connect the column driver signals of one column to
VCC, the other two to GND and query the row data signals.
CPU Reset Key
The CPU reset key is a global reset. Please refer to the Reset Chip section of this document for detailed informa-
tion.
Single Step Key
The single step key is connected to a normal input of the FPGA and can be used by the application as required.
This key is connected to a Schmitt trigger, meaning it is debounced. This key is used as a single clock for testing
your design.
Signal Name TST_COL0
TST_ROW0 1
TST_ROW1 4
TST_ROW2 7
TST_ROW3 C
Signal Name FPGA Pin
TST_ROW0 T1
TST_ROW1 T2
TST_ROW2 T3
TST_ROW3 R1
Col0
Col1
Col2
1 pressed
Row0
6 pressed
Row1
LatticeMico32/DSP Development Board
TST_COL1 TST_COL2
2
5
8
0
Signal Name FPGA Pin
TST_COL0
TST_COL1
TST_COL2
3 pressed
6 pressed
16
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