Eeprom Inte; Usim Inte - Holtek BS83B24C Manual

BS83B24C/BS83C40C
Touch Flash MCU
Timer Module Interrupts
The Compact and Periodic type TMs each has two interrupts, one comes from the comparator A
match situation and the other comes from the comparator P match situation. All of the TM interrupts
are contained within the Multi-function Interrupts. For all of the TM types there are two interrupt
request flags and two enable control bits. A TM interrupt request will take place when any of the
TM request flags are set, a situation which occurs when a TM comparator P or A match situation
happens.
To allow the program to branch to its respective interrupt vector address, the global interrupt enable
bit, EMI, respective TM Interrupt enable bit, and relevant Multi-function Interrupt enable bit, MFnE,
must first be set. When the interrupt is enabled, the stack is not full and a TM comparator match
situation occurs, a subroutine call to the relevant Multi-function Interrupt vector locations, will take
place. When the TM interrupt is serviced, the EMI bit will be automatically cleared to disable other
interrupts. However, only the related MFnF flag will be automatically cleared. As the TM interrupt
request flags will not be automatically cleared, they have to be cleared by the application program.
EEPROM Interrupt
An EEPROM Interrupt request will take place when the EEPROM Interrupt request flag, DEF, is set,
which occurs when an EEPROM Write cycle ends. To allow the program to branch to its respective
interrupt vector address, the global interrupt enable bit, EMI, and EEPROM Interrupt enable bit,
DEE, must first be set. When the interrupt is enabled, the stack is not full and an EEPROM Write
cycle ends, a subroutine call to the respective EEPROM Interrupt vector will take place. When the
EEPROM Interrupt is serviced, the DEF flag will be automatically cleared, the EMI bit will also be
automatically cleared to disable other interrupts.
USIM Interrupt
The Universal Serial Interface Module Interrupt, also known as the USIM interrupt, will take place
when the USIM Interrupt request flag, USIMF, is set. As the USIM interface can operate in three
modes which are SPI mode, I
conditions depending on the selected interface mode.
If the SPI or I C mode is selected, the USIM interrupt can be triggered when a byte of data has been
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received or transmitted by the USIM SPI or I
or an I C bus time-out occurs. If the UART mode is selected, several individual UART conditions
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including a transmitter data register empty, transmitter idle, receiver data available, receiver overrun,
address detect and an RX pin wake-up, can generate a USIM interrupt with the USIMF flag bit set
high.
To allow the program to branch to its respective interrupt vector address, the global interrupt enable
bit, EMI, and the Universal Serial Interface Module Interrupt enable bit, USIME, must first be set.
When the interrupt is enabled, the stack is not full and any of the above described situations occurs,
a subroutine call to the respective Interrupt vector, will take place. When the interrupt is serviced,
the Universal Serial Interface Module Interrupt flag, USIMF, will be automatically cleared. The EMI
bit will also be automatically cleared to disable other interrupts.
Note that if the USIM interrupt is triggered by the UART interface, after the interrupt has been
servied, the UUSR register flags will be cleared automatically when certain actions are taken by the
UART, the details of which are given in the UART section.
Rev. 1.00
C mode and UART mode, the USIMF flag can be set by different
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C interface, or an I
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C slave address match occurs,
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