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MOPSlcdGX1 Product Manual
13. IDE-CONTROLLER INTERFACE
PCI-bus devices serve as primary and secondary IDE hosts on the MOPSlcdGX1. BIOS
automatically configures them, but you can disable them by using the BIOS Setup Utility.
Resources used by primary and secondary IDE host adapters are compatible with the
PC/AT.
The IDE controller supports the following modes:
• Ultra 33 DMA mode
• PIO modes up to Mode-4 timing
• Multiword DMA Mode 0, 1, 2 with independent timing
Use a master/slave daisy chain when connecting two devices to a single adapter.
For more information on IDE-controller interfaces, please see the
Literature and Standards
13.1 IDE Connector (X5)
The IDE connector is a 44-pin, dual in-line, 2mm-pitch, male header.
To find the location of Connector X5 on the MOPSlcdGX1 board, please see the
Appendix E: Connector Layout
IDE Connector for 2.5 " Hard Disk (X5)
Pin
Signal
1
RESET#
3
D7
5
D6
7
D5
9
D4
11
D3
13
D2
15
D1
17
D0
19
GND
21
NC
23
IOW#
25
IOR#
27
RDY
29
ACK
31
IRQ14
33
SA1
35
SA 0
Kontron Embedded Modules
chapter.
chapter.
Pin
Signal
2
GND
4
D8
6
D9
8
D10
10
D11
12
D12
14
D13
16
D14
18
D15
20
NC
22
GND
24
GND
26
GND
28
NC
30
GND
32
NC
34
NC
36
SA2
24
IDE-Controller Interface
Appendix G:
Revision 1.3
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