Arrow DECA User Manual page 86

Table of Contents

Advertisement

The built-in ANAIN1 and ANAIN2 channels in MAX 10 on the DECA board receive signals
coming out of amplifier circuits.
the first SMA input in this demonstration. "Standard sequencer with Avalon-MM sample storage"
is selected as the core to control the ADC. Channel 0 in the first ADC is enabled because the first
SMA input is connected to the ANAIN1 pin.
The macro IOWR in Nios II program is used to access the controller's register file. The following
statements enable the ADC translation continuously.
DECA User Manual
Figure 6-13 Block diagram of SMA ADC
Figure 6-14
Figure 6-14 Settings of Altera Modular ADC Core
85
shows the settings of Altera Modular ADC core for
www.terasic.com
May 22, 2015

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents