Arrow DECA User Manual page 75

The touch status is reported in the state register in CY8CMBR3102.
CapSense state register content. The register address is 0xAA. There are 16 bits in the state register,
but CY8CMBR3102 has only two sensors so only register bit CS0 (Bit0) and CS1 (Bit1) are used.
When CapSense is pressed, the value of corresponding CS bit will be 1. The CS bit will be 0 once
CapSense is released.
Figure 6-3 shows the host reading CapSense button state through I2C. Note, the CY8CMBR3102
wakes up from the low-power state upon address match but still sends NACK until it transits into
Active state. When the device sends NACK from a transaction, the host is expected to repeat the
DECA User Manual
Figure 6-1 Block diagram of CY8CMBR3102 demonstration
Figure 6-2 Register table of CapSense state
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Figure 6-2 shows the
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May 22, 2015