Arrow DECA User Manual page 25

Figure 3-17 shows the connection between the two 2x23 headers and MAX 10 FPGA.
shows the pin assignment of two 2x23 headers.
Figure 3-17 Connections between the two 2x23 header and MAX 10 FPGA
Signal Name
GPIO0_D[0]
GPIO0_D[1]
GPIO0_D[2]
GPIO0_D[3]
GPIO0_D[4]
GPIO0_D[5]
GPIO0_D[6]
GPIO0_D[7]
GPIO0_D[8]
GPIO0_D[9]
GPIO0_D[10]
GPIO0_D[11]
GPIO0_D[12]
GPIO0_D[13]
GPIO0_D[14]
GPIO0_D[15]
GPIO0_D[16]
GPIO0_D[17]
GPIO0_D[18]
DECA User Manual
Table 3-9 Pin Assignment of Expansion Headers
FPGA Pin No. Description
PIN_W18 GPIO (P8) Connection 0[0]
PIN_Y18 GPIO (P8) Connection 0[1]
PIN_Y19 GPIO (P8) Connection 0[2]
PIN_AA17 GPIO (P8) Connection 0[3]
PIN_AA20 GPIO (P8) Connection 0[4]
PIN_AA19 GPIO (P8) Connection 0[5]
PIN_AB21 GPIO (P8) Connection 0[6]
PIN_AB20 GPIO (P8) Connection 0[7]
PIN_AB19 GPIO (P8) Connection 0[8]
PIN_Y16 GPIO (P8) Connection 0[9]
PIN_V16 GPIO (P8) Connection 0[10]
PIN_AB18 GPIO (P8) Connection 0[11]
PIN_V15 GPIO (P8) Connection 0[12]
PIN_W17 GPIO (P8) Connection 0[13]
PIN_AB17 GPIO (P8) Connection 0[14]
PIN_AA16 GPIO (P8) Connection 0[15]
PIN_AB16 GPIO (P8) Connection 0[16]
PIN_W16 GPIO (P8) Connection 0[17]
PIN_AB15 GPIO (P8) Connection 0[18]
24
Table 3-9
I/O Standard
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
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May 22, 2015