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3.4.9
H
D
M
I
H
D
M
I
The development board provides High Performance HDMI Transmitter via the Analog Devices
ADV7513 which incorporates HDMI v1.4 features, including 3D video support, and 165 MHz
supports all video formats up to 1080p and UXGA. The ADV7513 is controlled via a serial I2C bus
interface, which is connected to pins on the MAX 10 FPGA. A schematic diagram of the audio
circuitry is shown in
available on the manufacturer's website, or under the Datasheets\HDMI folder on the Kit System
CD.
Table 3-14
lists the HDMI Interface pin assignments and signal names relative to the MAX 10
device.
Figure 3-23 Connection between the MAX 10 FPGA and HDMI transmitter
Signal Name
HDMI_TX_D0
HDMI_TX_D1
HDMI_TX_D2
HDMI_TX_D3
HDMI_TX_D4
HDMI_TX_D5
HDMI_TX_D6
HDMI_TX_D7
HDMI_TX_D8
HDMI_TX_D9
HDMI_TX_D10
HDMI_TX_D11
DECA User Manual
T
X
T
X
Figure 3-23
Detailed information on using the ADV7513 HDMI TX is
Table 3-14 Pin Assignment of HDMI TX
FPGA Pin No.
Description
PIN_C18
Video Data bus
PIN_D17
Video Data bus
PIN_C17
Video Data bus
PIN_C19
Video Data bus
PIN_D14
Video Data bus
PIN_B19
Video Data bus
PIN_D13
Video Data bus
PIN_A19
Video Data bus
PIN_C14
Video Data bus
PIN_A17
Video Data bus
PIN_B16
Video Data bus
PIN_C15
Video Data bus
33
I/O Standard
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
www.terasic.com
May 22, 2015

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