8.1 mvHYPERION-CLx
IDC multi-pin connector 2 x 10 Pol RM 2.54 x 2.54 mm.
Note
Pins are not opto-isolated, feature no EMC filter and are not protected against overload and overvoltage.
Digital signals (pins 9-16) are LVTTL signals and not 5V tolerant. Failure to take this into account may
result in the destruction of the board.
Attention
Without an additional card with corresponding snubbers these signals must not conducted!
8.1.2.8 Switches
mvHYPERION
-CLb
-CLe
-CLm
Switch S1
Flash memory
Switch S2
Switch between TTL (5V) and PLC (24V) as well as Trigger and Sync on connector J3
Switch S3
Switch between TTL (5V) and PLC (24V) as well as Trigger and Sync on connector J4
MATRIX VISION GmbH
-
CLf
Position
Def.
User
Position
on
off
Position
on
off
Comment
Case of need FPGA version is
loaded (write protected)
FPGA version, which can be
updated, is loaded.
Comment
Trigger (1)
TTL (5V)
PLC (24V)
Comment
Trigger (1)
TTL (5V)
PLC (24V)
33
Sync (2)
TTL (5V)
PLC (24V)
Sync (2)
TTL (5V)
PLC (24V)
Need help?
Do you have a question about the mvHYPERION-Series and is the answer not in the manual?