Analog Devices ADSP-TS201S EZ-KIT Lite Manual page 90

M
master processors, 2-10
memory
map, of this EZ-KIT Lite,
select pins, See ~BMS, ~MS0,
microphones, 2-5
~MS0 memory bank 0 select pins, 1-7, 1-8,
MSSD0 external memory space,
N
notation conventions, xxi
O
oscillators (U18), 2-3, 2-12
P
package contents, 1-2
power
connector (J8), 2-21
LED (LED1), 2-16
regulators, 2-2
supply specifications,
processor IDs, 1-8, 1-12, 2-10,
programmable flag pins, See flags by name
(FLAGs)
push buttons
See also push buttons by name (SWx)
diagram of locations,
R
registration, of this product,
reset
master (LED8), 2-16
processor, 2-6
push button (SW3),
ADSP-TS201S EZ-KIT Lite Evaluation System Manual
1-7
1-7
2-3
1-8
2-23
2-15
2-16
1-3
2-19
resistors
diagram of locations,
clock mode settings,
control impedance selection,
drive strength selection,
processor ID settings,
restrictions, of the license,
RJ-45 connectors, 1-12,
RX port, 1-12
S
schematic, of this EZ-KIT Lite,
SCLK pins, 2-14
SCLKRAT2-0 pins, 2-3, 2-12,
SDRAM
interface, 1-8
start/end addresses, 1-8
SDRCON registers, 1-8,
setup, of this EZ-KIT Lite,
SOC registers, 1-8
specifications, of the power supply,
SQSTAT registers, 1-10
startup, of this EZ-KIT Lite,
SW10 (FLAG/IRQ) DIP switch,
SW1 (audio amplification) switch,
SW2 DIP switch, 2-7,
SW3 (reset) push button,
SW4 (IRQ0_A) push button, 1-11,
SW5 (IRQ0_B) push button, 1-11,
SW6 (FLAG0_B) push button, 1-11,
SW7 (FLAG1_B) push button, 1-11,
SW8 (FLAG1_A) push button, 1-11,
SW9 (FLAG0_A) push button, 1-11,
SYSCON registers, 1-8,
system architecture, of this EZ-KIT Lite,
T
TX port, 1-12
INDEX
2-10
2-12
2-14
2-15
2-11
1-7
2-23
B-1
2-13
2-7
1-4
2-23
1-5
2-9
2-5
2-8
2-19
2-19
2-19
2-18
2-18
2-18
2-18
2-7
2-2
I-3