Table 2-12
through
generator and the
modes, see the ADSP-TS201S processor data sheet at
http://www.analog.com/UploadedFiles/Data_Sheets/ADSP_TS201S.pdf
Table 2-12. Clock Generator (U1) Settings
R215
R224
Not populated
Populated
Not populated
Populated
Not populated
Populated
Populated
Populated
1
Populated
Populated
Populated
Populated
Populated
Not populated
Populated
Not populated
Populated
Not populated
1 Default settings
Table 2-13. SCLK Ratio Settings for Processor A
R128 (SCLKRAT2)
Not populated
1
Not populated
Not populated
Not populated
Populated
Populated
ADSP-TS201S EZ-KIT Lite Evaluation System Manual
ADSP-TS201S EZ-KIT Lite Hardware Reference
Table 2-14
show the resistor settings for the clock
pins. For more information on the clock
SCLKRAT
R3
Not populated
Populated
Populated
Not populated
Populated
Populated
Not populated
Populated
Populated
R127 (SCLKRAT1)
R133 (SCLKRAT0)
Not populated
Not populated
Not populated
Populated
Populated
Not populated
Populated
Populated
Not populated
Not populated
Not populated
Populated
R223
Multiplication Factor
Populated
2
Populated
3
Not populated
4
Populated
4.25
Populated
5
Not populated
6
Populated
6.25
Populated
8
Not populated
Reserved (test mode)
Multiplication Factor
4
5
6
7
8
10
.
2-13
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